DS125BR800 Datasheet, PDF (15/59 Pages) Texas Instruments – Low-Power 12.5-Gbps 8-Channel Repeater With Input Equalization and Output De-Emphasis

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DS125BR800
SNLS426E – AUGUST 2012 – REVISED JANUARY 2015
2. Write registers 0x0D[1]= 1'b, 0x14[1] = 1'b, 0x1B[1] = 1'b, 0x22[1] = 1'b //* CH0 - CH3
3. Write registers 0x2A[1]= 1'b, 0x31[1] = 1'b, 0x38[1] = 1'b, 0x3F[1] = 1'b //* CH4 - CH7
MODE
(PIN 21)
0
R
F (default)
1
Table 6. MODE Operation With Pin Control
Driver Characteristics
Limiting
Transparent without DE
Automatic
Transparent with DE
PCIe
X
SAS
SATA
X
10G-KR
10GbE
X
CPRI
OBSAI
X
X
SRIO
(R)XAUI
X
Interlaken
Infiniband
X
NOTE: Automatic operation allows input to sense the incoming data-rate and utilize a "Transparent" output driver
for operation at or above 8 Gbps.
NOTE: SAS/SATA up to 6 Gbps.
8.3.2.2 MODE Operation with SMBus Registers
When in SMBus mode (Slave or Master), the MODE pin retains control of the output driver characteristics. In
order to override this control function, Register 0x08[2] must be written with a "1". Writing this bit enables MODE
control of each channel individually using the channel registers defined in Table 10.
8.4 Device Functional Modes
8.4.1 Pin Control Mode
When in pin mode (ENSMB = 0), equalization and de-emphasis can be selected via pin for each side
independently. When de-emphasis is asserted VOD is automatically adjusted per Table 3. For PCIe applications,
the RXDET pins provides automatic and manual control for input termination (50 Ω or >50 kΩ). MODE setting is
also pin controllable with pin selections (PCIe Gen-1, PCIe Gen-2, auto detect, and PCIe Gen-3). The receiver
electrical idle detect threshold is also adjustable via the SD_TH pin.
8.4.2 SMBus Mode
When in SMBus mode (ENSMB = 1), the VOD (output amplitude), equalization, de-emphasis, and termination
disable features are all programmable on a individual lane basis, instead of grouped by A or B as in the pin mode
case. Upon assertion of ENSMB, the EQx and DEMx functions revert to register control immediately. The EQx
and DEMx pins are converted to AD0-AD3 SMBus address inputs. The other external control pins (MODE,
RXDET and SD_TH) remain active unless their respective registers are written to and the appropriate override bit
is set, in which case they are ignored until ENSMB is driven low (pin mode). On power-up and when ENSMB is
driven low all registers are reset to their default state. If PWDN is asserted while ENSMB is high, the registers
retain their current state.
Equalization settings accessible via the pin controls were chosen to meet the needs of most high speed
applications. If additional fine tuning or adjustment is needed, additional equalization settings can be accessed
via the SMBus registers. Each input has a total of 256 possible equalization settings. 4-level Input Configuration
Guidelines shows the 16 setting when the device is in pin mode. When using SMBus mode, the equalization,
VOD and de-Emphasis levels are set by registers.
8.5 Programming
8.5.1 SMBus Master Mode
The DS125BR800 devices support reading directly from an external EEPROM device by implementing SMBus
Master mode. When using the SMBus master mode, the DS125BR800 will read directly from specific location in
the external EEPROM. When designing a system for using the external EEPROM, the user needs to follow these
specific guidelines. For additional information, refer to SNLA228.
• Set ENSMB = Float — enable the SMBUS master mode.
• The external EEPROM device address byte must be 0xA0 and capable of 520 kHz operation at 2.5 V and 3.3
V supply.
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