DS125BR800 Datasheet, PDF (25/59 Pages) Texas Instruments – Low-Power 12.5-Gbps 8-Channel Repeater With Input Equalization and Output De-Emphasis

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8.6 Register Maps
Address Register Name
Bit
0x00
Device Address
7
Observation
6:3
2
1:0
0x01
PWDN Channels
7:0
0x02
0x03
0x04
0x05
0x05
0x06
Override
7:1
PWDN Control
0
Reserved
7:0
Reserved
7:0
Reserved
7:0
Reserved
7:0
Slave Register Control
7:5
4
3
0x07
2:0
Digital Reset and Control 7
6
5
4:0
DS125BR800
SNLS426E – AUGUST 2012 – REVISED JANUARY 2015
Table 10. SMBUS Slave Mode Register Map
Field
Reserved
Address Bit
AD[3:0]
Type
R/W
R
Default
0x00
EEPROM Read Done R
Reserved
R/W
PWDN CHx
R/W
0x00
Reserved
Override PWDN
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Register Enable
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x00
R/W 0x10
Reserved
Reserved
R/W
Reset Registers
Reset SMBus Master
Reserved
0x01
EEPROM Bit
Yes
Yes
Yes
Yes
Description
Set bit to 0.
Observation of AD[3:0] bit
[6]: AD3
[5]: AD2
[4]: AD1
[3]: AD0
1: Device completed the read from external EEPROM.
Set bits to 0.
Power Down per Channel
[7]: CH7 – CHA_3
[6]: CH6 – CHA_2
[5]: CH5 – CHA_1
[4]: CH4 – CHA_0
[3]: CH3 – CHB_3
[2]: CH2 – CHB_2
[1]: CH1 – CHB_1
[0]: CH0 – CHB_0
0x00 = all channels enabled
0xFF = all channels disabled
Note: override PWDN pin.
Set bits to 0.
1: Block PWDN pin control
0: Allow PWDN pin control
Set bits to 0
Set bits to 0
Set bits to 0
Reserved
Set bits to 0.
Set bit to 1.
1 = Enable SMBus Register Control
0 = Disable SMBus Register Control
Note: In order to change VOD, DEM, and EQ of the channels in
slave mode, this bit must be set to 1.
Set bits to 0.
Set bit to 0.
Self clearing bit, set to 1 to reset the register to default values
Self clearing reset to SMBus master state machine
Set bits to 0 0001'b.
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