DS125BR800 Datasheet, PDF (18/59 Pages) Texas Instruments – Low-Power 12.5-Gbps 8-Channel Repeater With Input Equalization and Output De-Emphasis

DS125BR800
SNLS426E – AUGUST 2012 – REVISED JANUARY 2015
www.ti.com
EEPROM Address Byte
Description
0x0B
SMBus Register
Default Value 02
Description
SMBus Register
Default Value FA
0x0C
Description
SMBus Register
Default Value 2F
0x0D
Description
SMBus Register
Default Value 00
0x0E
Description
SMBus Register
Default Value 2F
0x0F
Description
SMBus Register
Default Value AD
0x10
Description
SMBus Register
Default Value 40
0x11
Description
SMBus Register
Default Value 02
0x12
Description
SMBus Register
Default Value FA
0x13
Description
SMBus Register
Default Value D4
0x14
Description
SMBus Register
Default Value 09
0x15
Table 7. EEPROM Register Map - Single Device with Default Value (continued)
Bit 7
ch1_Idle_auto
0x15 [5]
0
Bit 6
ch1_Idle_sel
0x15 [4]
0
Bit 5
ch1_RXDET_1
0x15 [3]
0
Bit 4
ch1_RXDET_0
0x15 [2]
0
Bit 3
ch1_BST_7
0x16 [7]
0
Bit 2
ch1_BST_6
0x16 [6]
0
Bit 1
ch1_BST_5
0x16 [5]
1
BIt 0
ch1_BST_4
0x16 [4]
0
ch1_BST_3
0x16 [3]
1
ch1_BST_2
0x16 [2]
1
ch1_BST_1
0x16 [1]
1
ch1_BST_0
0x16 [0]
1
ch1_Sel_scp
0x17 [7]
1
ch1_Sel_mode
0x17 [6]
0
ch1_RES_2
0x17 [5]
1
ch1_RES_1
0x17 [4]
0
ch1_RES_0
0x17 [3]
1
ch1_VOD_2
0x17 [2]
1
ch1_VOD_1
0x17 [1]
0
ch1_VOD_0
0x17 [0]
1
ch1_DEM_2
0x18 [2]
0
ch1_DEM_1
0x18 [1]
1
ch1_DEM_0
0x18 [0]
0
ch1_Slow
0x19 [7]
0
ch1_idle_tha_1
0x19 [3]
0
ch1_idle_tha_0
0x19 [2]
0
ch1_idle_thd_1
0x19 [1]
0
ch1_idle_thd_0
0x19 [0]
0
ch2_Idle_auto
0x1C [5]
0
ch2_Idle_sel
0x1C [4]
0
ch2_RXDET_1
0x1C [3]
0
ch2_RXDET_0
0x1C [2]
0
ch2_BST_7
0x1D [7]
0
ch2_BST_6
0x1D [6]
0
ch2_BST_5
0x1D [5]
1
ch2_BST_4
0x1D [4]
0
ch2_BST_3
0x1D [3]
1
ch2_BST_2
0x1D [2]
1
ch2_BST_1
0x1D [1]
1
ch2_BST_0
0x1D [0]
1
ch2_Sel_scp
0x1E [7]
1
ch2_Sel_mode
0x1E [6]
0
ch2_RES_2
0x1E [5]
1
ch2_RES_1
0x1E [4]
0
ch2_RES_0
0x1E [3]
1
ch2_VOD_2
0x1E [2]
1
ch2_VOD_1
0x1E [1]
0
ch2_VOD_0
0x1E [0]
1
ch2_DEM_2
0x1F [2]
0
ch2_DEM_1
0x1F [1]
1
ch2_DEM_0
0x1F [0]
0
ch2_Slow
0x20 [7]
0
ch2_idle_tha_1
0x20 [3]
0
ch2_idle_tha_0
0x20 [2]
0
ch2_idle_thd_1
0x20 [1]
0
ch2_idle_thd_0
0x20 [0]
0
ch3_Idle_auto
0x23 [5]
0
ch3_Idle_sel
0x23 [4]
0
ch3_RXDET_1
0x23 [3]
0
ch3_RXDET_0
0x23 [2]
0
ch3_BST_7
0x24 [7]
0
ch3_BST_6
0x24 [6]
0
ch3_BST_5
0x24 [5]
1
ch3_BST_4
0x24 [4]
0
ch3_BST_3
0x24 [3]
1
ch3_BST_2
0x24 [2]
1
ch3_BST_1
0x24 [1]
1
ch3_BST_0
0x24 [0]
1
ch3_Sel_scp
0x25 [7]
1
ch3_Sel_mode
0x25 [6]
0
ch3_RES_2
0x25 [5]
1
ch3_RES_1
0x25 [4]
0
ch3_RES_0
0x25 [3]
1
ch3_VOD_2
0x25 [2]
1
ch3_VOD_1
0x25 [1]
0
ch3_VOD_0
0x25 [0]
1
ch3_DEM_2
0x26 [2]
0
ch3_DEM_1
0x26 [1]
1
ch3_DEM_0
0x26 [0]
0
ch3_Slow
0x27 [7]
0
ch3_idle_tha_1
0x27 [3]
0
ch3_idle_tha_0
0x27 [2]
0
ch3_idle_thd_1
0x27 [1]
0
ch3_idle_thd_0
0x27 [0]
0
ovrd_fast_idle
0x28 [6]
0
en_high_idle_th_n
0x28 [5]
0
en_high_idle_th_s
0x28 [4]
0
en_fast_idle_n
0x28 [3]
1
18
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