THS10064_09 Datasheet, PDF (33/42 Pages) Texas Instruments – 10-BIT, 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

www.ti.com
THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
INTERFACING THE THS10064 TO THE TMS320C6201 DSP
The following application circuit shows an interface of the THS10064 to the TMS320C6201. The read (using RD,
RD-controlled) and write timings (using WR, WR-controlled) shown before are valid for this specific interface.
THS10064–1
TMS320C6201
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS10064–2
CE1
EA20
ARE
AWE
EXT_INT6
DATA
TOUT1
TOUT2
EA21
EXT_INT7
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE
The THS10064 features four analog input channels. These can be configured for either single-ended or differential
operation. Best performance is achieved in differential mode. Figure 42 shows a simplified model, where a
single-ended configuration for channel AINP is selected. The reference voltages for the ADC itself are V_REFP and
V_REFM (either internal or external reference voltage). The analog input voltage range goes from V_REFM to V_REFP. This
means that V_REFM defines the minimum voltage, which can be applied to the ADC. V_REFP defines the maximum
voltage, which can be applied to the ADC. The internal reference source provides the voltage V_REFM of 1.5 V and
the voltage V_REFP of 3.5 V. The resulting analog input voltage swing of 2 V can be expressed by:
v v VREFM AINP VREFP
(1)
VREFP
AINP
10-Bit
ADC
VREFM
Figure 42. Single-Ended Input Stage
33