THS10064_09 Datasheet, PDF (18/42 Pages) Texas Instruments – 10-BIT, 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
www.ti.com
Figure 29 shows the timing of continuous conversion mode when three analog input channels are selected. The
maximum throughput rate per channel is 2 MSPS in this mode. The data flow in the bottom of the figure shows in
which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger
level set to 3.
Sample N
Channel 1,2,3
Sample N+1
Channel 1,2,3
AIN
tw(CONV_CLKH)
CONV_CLK
td(A)
td(Pipe)
tw(CONV_CLKL)
50%
50%
Data Into
FIFO
tc
Data N–2
Channel 2
Data N–2
Channel 3
Data N–1
Channel 1
td(O)
Data N–1
Channel 2
Data N–1
Channel 3
DATA_AV,
Trigger Level = 3
Sample N+2
Channel 1,2,3
Data N
Channel 1
Data N
Channel 2
Data N
Channel 3
td(DATA_AV)
Figure 29. Timing of Continuous Conversion Mode (3-channel operation)
Figure 30 shows the timing of continuous conversion mode when four analog input channels are selected. The
maximum throughput rate per channel is 1.5 MSPS in this mode. The data flow in the bottom of the figure shows
in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger
level of 4.
Sample N
Channel 1,2,3,4
AIN
tw(CONV_CLKH)
CONV_CLK
td(A)
50%
td(Pipe)
tw(CONV_CLKL)
50%
tc
Data Into
FIFO
Data N–2
Channel 4
Data N–1 Data N–1
Channel 1 Channel 2
Sample N+1
Channel 1,2,3,4
td(O)
Data N–1 Data N–1
Channel 3 Channel 4
Data N
Channel 1
Sample N+2
Channel 1,2,3,4
Data N
Data N
Channel 2 Channel 3
Data N
Channel 4
td(DATA_AV)
DATA_AV,
Trigger Level = 4
Figure 30. Timing of Continuous Conversion Mode (4-channel operation)
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