THS10064_09 Datasheet, PDF (25/42 Pages) Texas Instruments – 10-BIT, 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

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ANALOG INPUT CHANNEL SELECTION
THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
The analog input channels of the THS10064 can be selected via bits 3 to 7 of control register 0. One single channel
(single-ended or differential) is selected via bit 3 and bit 4 of control register 0. Bit 5 controls the selection between
single-ended and differential configuration. Bit 6 and bit 7 select the autoscan mode, if more than one input channel
is selected. Table 10 shows the possible selections.
Table 10. Analog Input Channel Configurations
BIT 7
SCAN
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
BIT 6
DIFF1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
1
1
1
1
1
1
BIT 5
DIFF0
0
0
0
0
1
1
0
0
0
1
1
0
1
1
0
1
1
0
0
0
1
1
1
1
BIT 4
CHSEL1
0
0
1
1
0
0
0
1
1
0
1
0
1
1
0
0
1
0
1
1
0
0
1
1
BIT 3
CHSEL0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
0
0
1
0
0
1
0
1
0
1
DESCRIPTION OF THE SELECTED INPUTS
Analog input AINP (single ended)
Analog input AINM (single ended)
Analog input BINP (single ended)
Analog input BINM (single ended)
Differential channel (AINP–AINM)
Differential channel (BINP–BINM)
Autoscan two single ended channels: AINP, AINM, AINP, …
Autoscan three single ended channels: AINP, AINM, BINP, AINP, …
Autoscan four single ended channels: AINP, AINM, BINP, BINM, AINP, …
Autoscan one differential channel and one single ended channel AINP,
(BINP–BINM), AINP, (BINP–BINM), …
Autoscan one differential channel and two single ended channel AINP,
AINM, (BINP–BINM), AINP, …
Autoscan two differential channels (AINP–AINM), (BINP–BINM),
(AINP–AINM), …
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Test Mode
The test mode of the ADC is selected via bit 8 and bit 9 of control register 0. The different selections are shown in
Table 11.
Table 11. Test Mode
BIT 9
TEST1
0
0
1
1
BIT 8
TEST0
0
1
0
1
OUTPUT RESULT
Normal mode
VREFP
((VREFM)+(VREFP))/2
VREFM
Three different options can be selected. This feature allows support testing of hardware connections between the
ADC and the processor.
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