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TMS320DM8148 Datasheet, PDF (325/343 Pages) Texas Instruments – TMS320DM814x DaVinci™ Digital Media Processors
TMS320DM8148, TMS320DM8147
www.ti.com
SPRS647 – MARCH 2011
Table 8-92. Timing Requirements for SPI - Slave Mode (continued)
(see Figure 8-92 and Figure 8-93)
NO.
9 th(SPICLK-SCS)
Hold time, SPI_SCS[x] valid after SPI_CLK last edge(1)
OPP100
MIN
12.92
MAX
UNIT
ns
PHA=0
SPI_SCS[x] (In)
EPOL=1
1
3
8
2
9
SPI_SCLK (In) POL=0
1
3
POL=1
2
SPI_SCLK (In)
SPI_D[x] (Out)
7
Bit n-1
6
Bit n-2
6
Bit n-3
Bit n-4
Bit 0
SPI_SCS[x] (In)
PHA=1
EPOL=1
SPI_SCLK (In) POL=0
SPI_SCLK (In)
POL=1
SPI_D[x] (Out)
1
3
8
2
1
2
3
6
Bit n-1
6
Bit n-2
6
Bit n-3
6
Bit 1
Figure 8-92. SPI Slave Mode Transmit Timing
9
Bit 0
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Timings 325
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