TMS320DM8148 Datasheet, PDF (285/343 Pages) Texas Instruments – TMS320DM814x DaVinci™ Digital Media Processors

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TMS320DM8148, TMS320DM8147
DDR Differential CK Input Buffers
SPRS647 – MARCH 2011
+–
+–
Processor
+
Differential Clock
Output Buffer
–
Clock Parallel
Terminator
Rcp
DDR_1V5
A1
A2
A3
AT
Cac
Rcp
0.1 µF
A1
A2
A3
AT
Routed as Differential Pair
Figure 8-64. CK Topology for Two DDR3 Devices
DDR Address/Control Input Buffers
Processor
Address/Control
Output Buffer
Address/Control
Terminator
Rtt
A1
A2
A3
AT
Vtt
Figure 8-65. ADDR_CTRL Topology for Two DDR3 Devices
8.13.1.2.14.2.2 CK and ADDR_CTRL Routing, Two DDR3 Devices
Figure 8-66 shows the CK routing for two DDR3 devices placed on the same side of the PCB. Figure 8-67
shows the corresponding ADDR_CTRL routing.
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Timings 285
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