TMS320DM8148 Datasheet, PDF (195/343 Pages) Texas Instruments – TMS320DM814x DaVinci™ Digital Media Processors

TMS320DM8148, TMS320DM8147
www.ti.com
SPRS647 – MARCH 2011
Table 7-25. Maximum Module Clock Frequencies (continued)
MODULE
GPIO Debounce
GPMC
HDMI
HDMI CEC
HDMI I2S
HDVICP
HDVPSS
HDVPSS VOUT1
HDVPSS VOUT0
HDVPSS SD VENC
I2C0/1/2/3
ISS
L3 Fast
L3 Medium
L3 Slow
L4 Fast
L4 Slow
Mailbox
McASP
McASP0/1/2 AUX_CLK
McASP3/4/5 AUX_CLK
McBSP CLKS
Media Controller
MMCSD0/1/2
OCMC RAM
PCIe SERDES
SATA SERDES
SGX530
SmartReflex
SPI0/1/2/3
Spinlock
Sync Timer
TIMER1/2/3/4/5/6/7/8
UART0/1/2
CLOCK SOURCE(S)
SYSCLK18
SYSCLK6
PLL_VIDEO2
SYSCLK10
SYSCLK20
SYSCLK21
AUD_CLK0/1/2
AUX Clock
SYSCLK3
PLL_HDVPSS
PLL_VIDEO2
HDMI PHY
PLL_VIDEO1
PLL_VIDEO2
PLL_VIDEO0
SYSCLK10
PLL_ MEDIACTL
SYSCLK4
SYSCLK4
SYSCLK6
SYSCLK4
SYSCLK6
SYSCLK6
SYSCLK6
SYSCLK20
SYSCLK21
PLL_AUDIO
PLL_VIDEO0/1/2
AUD_CLK0/1/2
AUX Clock
SYSCLK20
SYSCLK21
AUD_CLK0/1/2
AUX Clock
PLL_MEDIACTL
SYSCLK8
SYSCLK4
SERDES_CLKx Pins
DEV Clock
SERDES_CLKx Pins
SYSCLK23
DEV Clock
SYSCLK10
SYSCLK6
SYSCLK18
SYSCLK18
DEV Clock
AUX Clock
AUD_CLK0/1/2
TCLKIN
SYSCLK10
MAX FREQUENCY
OPP100 (MHz)
Fixed 0.032768
100
186
Fixed 48
50
266
200
186
148.5
Fixed 54
48
400
200
200
100
200
100
100
100
192
192
192
400
192
200
100
20 or 100
200
30
48
100
Fixed 0.032768
30
48
Copyright © 2011, Texas Instruments Incorporated
Power, Reset, Clocking, and Interrupts 195
Submit Documentation Feedback
Product Folder Link(s): TMS320DM8148 TMS320DM8147