TMS320DM8148 Datasheet, PDF (263/343 Pages) Texas Instruments – TMS320DM814x DaVinci™ Digital Media Processors

TMS320DM8148, TMS320DM8147
www.ti.com
SPRS647 – MARCH 2011
specification. The design rules constrain PCB trace length, PCB trace skew, signal integrity, cross-talk,
and signal timing. These rules, when followed, result in a reliable DDR2 memory system without the need
for a complex timing closure process. For more information regarding the guidelines for using this DDR2
specification, see Understanding TI’s PCB Routing Rule-Based DDR2 Timing Specification Application
Report (SPRAAV0).
8.13.1.1.2.1 DDR2 Interface Schematic
Figure 8-46 shows the DDR2 interface schematic for a x32 DDR2 memory system. In Figure 8-47 the x16
DDR2 system schematic is identical except that the high-word DDR2 device is deleted.
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Timings 263
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