COP888CL Datasheet, PDF (31/42 Pages) Texas Instruments – COP888CL 8-Bit Microcontroller

Instruction Set (Continued)
INSTRUCTION SET (Continued)
JSRL
JSR
JID
RET
RETSK
RETI
INTR
NOP
Addr.
Addr
Jump SubRoutine Long
Jump SubRoutine
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETurn from Interrupt
Generate an Interrupt
No OPeration
Instruction Execution Time
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
See the BYTES and CYCLES per INSTRUCTION table for
details.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
[B]
ADD
1/1
ADC
1/1
SUBC
1/1
AND
1/1
OR
1/1
XOR
1/1
IFEQ
1/1
IFNE
1/1
IFGT
1/1
IFBNE
1/1
DRSZ
SBIT
1/1
RBIT
1/1
IFBIT
1/1
Direct
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
3/4
1/3
3/4
3/4
3/4
RPND
1/1
Immed.
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
[SP]←PL, [SP−1]←PU,SP−2, PC←ii
[SP]←PL, [SP−1] ←PU,SP−2, PC9…0←i
PL←ROM (PU,A)
SP+2, PL←[SP], PU←[SP−1]
SP+2, PL←[SP],PU←[SP−1]
SP+2, PL←[SP],PU←[SP−1],GIE←1
[SP]←PL, [SP−1]←PU, SP−2, PC←0FF
PC←PC+1
Instructions Using A & C
CLRA
1/1
INCA
1/1
DECA
1/1
LAID
1/3
DCOR
1/1
RRCA
1/1
RLCA
1/1
SWAPA
1/1
SC
1/1
RC
1/1
IFC
1/1
IFNC
1/1
PUSHA
1/3
POPA
1/3
ANDSZ
2/2
Transfer of Control Instructions
JMPL
3/4
JMP
2/3
JP
1/3
JSRL
3/5
JSR
2/5
JID
1/3
VIS
1/5
RET
1/5
RETSK
1/5
RETI
1/5
INTR
1/7
NOP
1/1
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