DS90UR916Q Datasheet, PDF (30/41 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

PAGE ^{ADD ADD} Register Name Bit(s)
(dec) (hex)
0
2
2 Des Features 1 7
6
5:4
3
2:0
R/W ^Default Function
(bin)
R/W
0 OP_LOW
Release/Set
R/W
0 OSS_SEL
R/W 00 MAP_SEL
R/W
0 OP_LOW strap
bypass
R/W 00 OSC_SEL
Description
0: set outputs state LOW (except LOCK)
1: release output LOW state, outputs
toggling normally
Note: This register only works during
LOCK = 1.
Output Sleep State Select
0:PCLK/RGB[7:0]/HS/VS/DE = L, LOCK
= Normal, PASS = H
1:PCLK/RGB[7:0]/HS/VS/DE = Tri-
State, LOCK = Normal, PASS = H
Special for Backwards Compatible Mode
with DS90UR241)
00: bit 4, 5 on LSB
01: LSB zero or one
10: LSB zero
11: LSB zero
0: strap will determine whether OP_LOW
feature is ON or OFF
1: Turns OFF OP_LOW feature
000: OFF
001: 50 MHz ±40%
010: 25 MHz ±40%
011: 16.7 MHz ±40%
100: 12.5 MHz ±40%
101: 10 MHz ±40%
110: 8.3 MHz ±40%
111: 6.3 MHz ±40%
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