DS90UR916Q Datasheet, PDF (17/41 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

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FIGURE 12. Video Control Signal Filter Waveform
DESERIALIZER Functional Description
The Des converts a single input serial data stream to a wide
parallel output bus, and also provides a signal check for the
chipset Built In Self Test (BIST) mode. Several image en-
hancement features are provided (Note that these features
are not available when operating in backward compatible
modes). White balance LUTs allow the user to define and tar-
get the color temperature of the display. Adaptive Hi-FRC
dithering enables the presentation of “true-color” images on
an 18–bit color display. The device can be configured via ex-
ternal pins and strap pins or through the optional serial control
bus. The Des features enhance signal quality on the link by
supporting: an equalizer input and also the FPD-Link II data
coding that provides randomization, scrambling, and DC bal-
ancing of the data. The Des includes multiple features to
reduce EMI associated with display data transmission. This
includes the randomization and scrambling of the data and
also the output spread spectrum clock generation (SSCG)
support. The Des features power saving features with a power
down mode, and optional LVCMOS (1.8 V) interface compat-
ibility.
Image Enhancement Features
White Balance
The White Balance feature enables similar display appear-
ance when using LCD’s from different vendors. It compen-
sates for native color temperature of the display, and adjusts
relative intensities of R, G, B to maintain specified color tem-
perature. Programmable control registers are used to define
the contents of three LUTs (8-bit color value for Red, Green
and Blue) for the White Balance Feature. The LUTs map input
RGB values to new output RGB values. There are three LUTs,
one LUT for each color. Each LUT contains 256 entries, 8-bits
per entry with a total size of 6144 bits (3 x 256 x 8). All entries
are readable and writable. Calibrated values are loaded into
registers through the I2C interface (deserializer is a slave de-
vice). This feature may also be applied to lower color depth
applications such as 18–bit (666) and 16–bit (565). White bal-
ance is enabled and configured via serial bus register control.
LUT contents. The user must define and load the contents of
the LUT for each color (R,G,B). Regardless of the color depth
being driven (888, 666, 656), the user must always provide
contents for 3 complete LUTs - 256 colors x 8 bits x 3 tables.
Unused bits - LSBs -shall be set to “0” by the user.
When 24-bit (888) input data is being driven to a 24-bit dis-
play, each LUT (R, G and B) must contain 256 unique 8-bit
entries. The 8-bit white balanced data is then available at the
output of the DS90UR916 deserailizer, and driven to the dis-
play.
When 18-bit (666) input data is being driven to an 18-bit dis-
play, the white balance feature may be used in one of two
ways. First, simply load each LUT with 256, 8-bit entries. Each
8-bit entry is a 6-bit value (6 MSBs) with the 2 LSBs set to
“00”. Thus as total of 64 unique 6-bit white balance output
values are available for each color (R, G and B). The 6-bit
white balanced data is available at the output of the
DS90UR916 deserializer, and driven directly to the display.
Alternatively, with 6-bit input data the user may choose to load
complete 8-bit values into each LUT. This mode of operation
provides the user with finer resolution at the LUT output to
more closely achieve the desired white point of the calibrated
display. Although 8-bit data is loaded, only 64 unique 8-bit
white balance output values are available for each color (R,
G and B). The result is 8-bit white balanced data. Before driv-
ing to the output of the deserializer, the 8-bit data must be
reduced to 6-bit with an FRC dithering function. To operate in
this mode, the user must configure the DS90UR916 to enable
the FRC2 function.
Examples of the three types of LUT configurations described
are shown in Figure 13.
Enabling white balance.The user must load all 3 LUTs prior
to enabling the white balance feature. The following sequence
must be followed by the user.
To initialize white balance after power-on:
1. Load contents of all 3 LUTs . This requires a sequential
loading of LUTs - first RED, second GREEN, third BLUE. 256,
8-bit entries must be loaded to each LUT. Page registers must
be set to select each LUT.
2. Enable white balance
By default, the LUT data may not be reloaded after initializa-
tion at power-on.
An option does exist to allow LUT reloading after power-on
and initial LUT loading (as described above). This option may
only be used after enabling the white balance reload feature
via the associated serial bus control register. In this mode the
LUTs may be reloaded by the master controller via I2C. This
provides the user with the flexibility to refresh LUTs periodi-
cally , or upon system requirements to change to a new set
of LUT values. The host controller loads the updated LUT
values via the serial bus interface. There is no need to disable
the white balance feature while reloading the LUT data. Re-
freshing the white balance to the new set of LUT data will be
seamless - no interruption of displayed data.
It is important to note that initial loading of LUT values requires
that all 3 LUTs be loaded sequentially. When reloading, partial
LUT updates may be made. Refer to Applications Information
— Using Image Enhancement Features for a detailed de-
scription of the LUT loading and reloading procedures.
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