DS90UR916Q Datasheet, PDF (29/41 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II Deserializer with Image Enhancement

TABLE 10. DESERIALIZER — Serial Bus Control Registers
PAGE
ADD
(dec)
ADD
(hex)
Register Name
Bit(s)
0
0
0 Des Config 1
7
R/W
R/W
Default
(bin)
Function
0 LFMODE
6 R/W
0 OS_PCLK
5 R/W
0 OS_DATA
4 R/W
0 RFB
3:2 R/W 00 CONFIG
1 R/W
0 SLEEP
0 R/W
0 REG Control
0
1
1 Slave ID
7 R/W
0
6:0 R/W 1110000 ID[X]
Description
0: 20 to 65 MHz Operation
1: 5 to 20 MHz Operation
0: Normal PCLK Output Slew
1: Increased PCLK Slew
0: Normal DATA OUTPUT Slew
1: Increased Data Slew
0: Data strobed on Falling edge of PCLK
1: Data strobed on Rising edge of PCLK
00: Normal Mode, Control Signal Filter
Disabled
01: Normal Mode, Control Signal Filter
Enabled
10: Backwards Compatible
(DS90UR241)
11: Backwards Compatible (DS90C241)
Note – not the same function as
PowerDown (PDB)
0: normal mode
1: Sleep Mode – Register settings
retained.
0: Configurations set from control pins /
STRAP pins
1: Configurations set from registers
(except I2C_ID)
0: Address from ID[X] Pin
1: Address from Register
Serial Bus Device ID, Four IDs are:
7b '1110 001 (h'71)
7b '1110 010 (h'72)
7b '1110 011 (h'73)
7b '1110 110 (h'76)
All other addresses are Reserved.
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