BQ25120_16 Datasheet, PDF (28/68 Pages) Texas Instruments – Highly Integrated Battery Charge Management Solution

BQ25120, BQ25121
SLUSBZ9B – AUGUST 2015 – REVISED MAY 2016
www.ti.com
When the LSLDO output is disabled with LSCTRL or through the register, an internal pull-down will discharge the
output.
9.3.23 Manual Reset Timer and Reset Output (MR and RESET)
The MR input has an internal pull-up to BAT, and MR is functional only when BAT is present or VIN is valid and
charge is enabled. The input conditions can be adjusted by using MRWAKE bits for the wake conditions and
MRRESET bits for the reset conditions. When a wake condition is met, a 128-µs pulse is sent on INT to notify
the host, and the WAKE1 and/or WAKE2 bits are updated on I²C. The MR_WAKE bits and RESET FAULT bits
are not cleared until the Push-button Control Register is read from I²C.
When a MR reset condition is met, a 128us pulse is sent on INT to notify the host and a RESET signal is
asserted. A reset pulse occurs with duration of t_{RESET_D} only one time after each valid MRRESET condition. The
MR pin must be released (go high) and then driven low for the MRWAKE period before RESET asserts again.
After RESET is asserted with battery only present, the device enters either Ship mode or Hi-Z mode depending
on MRREC register settings. After RESET is asserted with a valid V_IN present, the device resumes operation
prior to the MR button press. If SYS was disabled prior to RESET, the SYS output is re-enabled if recovering
into Hi-Z or Idle.
The MRRESET_VIN register can be configured to have RESET asserted by a button press only, or by a button
press and V_IN present (V_UVLO + V_SLP < V_IN < V_OVP).
9.4 Device Functional Modes
FUNCTION
VOVP
VUVLO
VBATUVLO
VINDPM
SYS
LS/LDO
BATFET
TS
IPRETERM
ISET
ILIM
MR input
LSCTRL input
RESET output
INT output
I²C interface
CD input
PG output
VBMON
Table 9. Modes and Functions
READY (PRIOR
TO I²C) AND
AFTER RESET
Yes
Yes
Yes
OTP or registers
OTP or registers
OTP or registers
Yes
Yes
External
External
External
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
HOST MODE
READY (AFTER
I²C)
CHARGE
Yes
Yes
Yes
Yes
Yes
Yes
OTP or registers
If enabled
OTP or registers
If enabled
OTP or registers
If enabled
Yes
Yes
Yes
Yes
OTP, registers, or OTP, registers, or
external
external
OTP, registers, or OTP, registers, or
external
external
OTP, registers, or OTP, registers, or
external
external
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
SHIP MODE
No
Yes
No
No
No
No
No
No
No
No
No
Yes
No
No
No
No
No
No
No
HIGH_Z
No
Yes
Yes
No
If enabled
If enabled
Yes
No
No
No
No
Yes
Yes
Yes
No
No
Yes
No
No
ACTIVE
BATTERY
No
Yes
Yes
No
If enabled
If enabled
Yes
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
If enabled
Yes
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