BQ25120_16 Datasheet, PDF (27/68 Pages) Texas Instruments – Highly Integrated Battery Charge Management Solution

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BQ25120, BQ25121
SLUSBZ9B – AUGUST 2015 – REVISED MAY 2016
INDUCTANCE (µH)
2.2
2.2
2.2
2.2
DCR (Ω)
0.23
0.225
0.12
0.145
Table 6. Inductor Series (continued)
DIMENSIONS
(mm³)
2.0 x 1.2 x 1.0
2.0 x 1.6 x 1.0
2.5 x 2.0 x 1.2
3.3 x 3.3 x 1.4
INDUCTOR TYPE
MIPSZ2012 2R2
74438343022
MIPSA2520 2R2
LPS3314
SUPPLIER ⁽¹⁾
TDK
Wurth
TDK
Coicraft
COMMENT
The PWM allows the use of small ceramic capacitors. Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. At
light load currents, the converter operates in Power Save Mode and the output voltage ripple is dependent on the
output capacitor value and the PFM peak inductor current. Because the PWM converter has a pulsating input
current, a low ESR input capacitor is required on PMID for the best voltage filtering to ensure proper function of
the device and to minimize input voltage spikes. For most applications a 10-µF capacitor value is sufficient. The
PMID capacitor can be increased to 22 µF for better input voltage filtering.
The following input/output capacitors are recommended:
CAPACITANCE (µF)
10
10
SIZE
0603
0402
(1) See Third-party Products Disclaimer
Table 7. Capacitors
CAPACITOR TYPE
GRM188R60J106ME84
CL05A106MP5NUNC
SUPPLIER ⁽¹⁾
Murata
Samsung EMA
COMMENT
Recommended
Smallest size (TO BE
TESTED)
9.3.22 Load Switch / LDO Output and Control
The device integrates a low Iq load switch which can also be used as a regulated output. The LSCTRL pin can
be used to turn the load on or off. Activating LSCTRL continuously holds the switch in the on state so long as
there is not a fault. The signal is active HI and has a low threshold making it capable of interfacing with low
voltage signals. To limit voltage drop or voltage transients, a small ceramic capacitor must be placed close to
VINLS. Due to the body diode of the PMOS switch, it is recommended to have the capacitor on VINLS ten times
larger than the output capacitor on LS/LDO.
The output voltage is programmable using the LS_LDO bits in the register. The LS/LDO voltage is calculated
using Equation 9.
LS/LDO = 0.8 V + LS_LDOCODE x 100 mV
(9)
If a value greater than 3.3 V is written, the setting goes to pass-through mode where LS/LDO = VINLS -
V_(DROPOUT). Table 8 summarizes the control of the LS/LDO output based on the I²C or LSCTRL pin setting:
I²C LS_LDO_EN
0
0
0
0
1
1
1
1
Table 8. LS/LDO Output Control
PIN LSCTRL
0
I²C V_LDO > 3.3
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
LS/LDO Output
Pulldown
Pulldown
V_LDO
LSW
V_LDO
LSW
V_LDO
LSW
If the output of the LDO is less than the programmed V_(SYS) voltage, connect VINLS to SYS. If the output of the
LDO is greater than the programmed V_SYS voltage, connect VINLS to PMID.
The current capability of the LDO depends on the VINLS input voltage and the programmed output voltage. The
full 100-mA output current for 0.8-V output voltage can be achieved when V_(VINLS) > 3.25 V. The full 100-mA
output current for 3.3-V output voltage can be achieved when V_(VINLS) > 3.6 V.
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