GC5316_14 Datasheet, PDF (27/76 Pages) Texas Instruments – HIGH-DENSITY DIGITAL DOWNCONVERTER AND UPCONVERTER

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GC5316
SLWS154A − JANUARY 2004 − REVISED MARCH 2004
The diagram above shows the different signal processing blocks and general signal processing flow of an individual
transmit channel. Within a DUC block a single set of hardware performs these functions for one UMTS signal or two
CDMA signals. When processing two CDMA signals the gain, round, power meter, PFIR and CFIR blocks are time
shared to process both signals with one set of hardware. Each DUC can support one UMTS channel or two CDMA
channels.
Each DUC block accepts baseband serial data. At this point the gain can be adjusted and a pilot sequence can be
summed with the data. Power can be measured, and then the data is pulse-shape filtered and interpolated to a higher
rate. The programmable FIR filter (PFIR) is used to pulse shape the data and interpolates by a factor of two. The
compensating CIC filter (CFIR) compensates for the roll-off of the following CIC filter and also interpolates by a factor
of two. The CIC filter performs additional interpolation which is programmable. The delay adjust block permits the
channel’s delay to be adjusted relative to all other DUC channels.
The interpolated, filtered, and delayed data is then tuned to a user-programmed frequency with a digital mixer and
oscillator. The DUC’s output data then drives four independent sum chain paths, where output data from each DUC
can be summed into four composite streams.
Each function block is described in greater detail in subsequent sections.
Table 1. Programming
VARIABLE
ddc_duc_ena
cdma_mode
DESCRIPTION
When set this turns on the DUC. When unset, the block is turned off.
When set, the DUC block is in CDMA2000 mode.
3.1.1 Transmit Serial Input Interface
1 UMTS
Imsb
1 UMTS
I
2 CDMA
CH A
Interleaved I,Q
txin_X_a
DUC Block
CDMA DUC Channel A
Imsb−1
Q
CH B
Interleaved I,Q
txin_X_b
CDMA DUC Channel B
Qmsb
Qmsb−1
Pins from adjacent DUC
2
4
Frame Strobe
Frame Clkdiv Sync
Delay
Shared between two DUC blocks; ie 2k & 2k+1, k=0 to 5
Figure 22. Transmit Serial Input Interface
Each DUC block has two serial input data pins. These pins are used to transfer I/Q baseband data into the DUC
channel for interpolation, filtering, and tuning to a carrier frequency. How these pins are used depends on the channel
configuration of the DUC block.
When the block is configured for two CDMA channels, one pin (txin_X_a) accepts serial data for signal A, the other
pin (txin_X_b) for signal B. Input I and Q data, programmable up to 18 bits, is multiplexed over the serial input pin
starting with the most significant I bit. The maximum input bit rate is txclk. The interface can be programmed to accept
up to 32 bits, but only the upper 18 bits will be used as input signal data.
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