DS64BR111_13 Datasheet, PDF (27/39 Pages) Texas Instruments – DS64BR111 Ultra Low Power 6.4 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis

DS64BR111
www.ti.com
SNLS343C – SEPTEMBER 2011 – REVISED APRIL 2013
Address
0x11
Register
Name
CH A
Control 2
0x12
CH A
Idle
Threshold
0x13
CH B
Analog
Override 1
0x14
0x15
CH B
Reserved
CH B
Idle Control
0x16
CH B
EQ Setting
Table 9. SMBus Register Map (continued)
Bits
Field
7:5 Reserved
4
Reserved
3
Reserved
2:0 DEM [2:0]
7
Slow OOB
6:4 Reserved
3:2 idle_thA[1:0]
1:0 idle_thD[1:0]
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3:0 Reserved
7:0 Reserved
Type Default
R 0x82
R/W
R/W 0x00
R/W 0x00
R/W 0x00
EEPROM
Reg Bit
Yes
Yes
Yes
Yes
Description
Set bits to = 100'b
Set bit to 0
Set bit to 0
De-Emphasis (Default = -3.5 dB)
000'b = -0.0 dB
001'b = -1.5 dB
010'b = -3.5 dB
011'b = -6.0 dB
100'b = -8.0 dB
101'b = -9.0 dB
110'b = -10.5 dB
111'b = -12.0 dB
Slow OOB Enable (1); Disable (0)
Set bits to 000'b.
Assert Thresholds
Use only if register 0x08 [6] = 1
00 = 180 mV (Default)
01 = 160 mV
10 = 210 mV
11= 190 mV
De-assert Thresholds
Use only if register 0x08 [6] = 1
00 = 110 mV (Default)
01 = 100 mV
10 = 150 mV
11= 130 mV
Set bit to 0
Set bit to 0
Set bit to 0
Set bit to 0
Set bits to 0000'b.
Set bits to 00'h.
7:6 Reserved
5
Idle Auto
4
Idle Select
3:2 Reserved
1:0 Reserved
7:0 BOOST [7:0]
R/W 0x00
R/W 0x2F
Set bits to 00'b
Yes
Auto IDLE value when override bit is set (reg
0x08 [4] = 1)
Yes
Force IDLE value when override bit is set (reg
0x08 [4] = 1)
Yes
Set bits to 00'b.
Set bits to 00'b.
Yes
EQ Boost Default to 24 dB
See EQ Table for Information
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