DS64BR111_13 Datasheet, PDF (12/39 Pages) Texas Instruments – DS64BR111 Ultra Low Power 6.4 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis

DS64BR111
SNLS343C – SEPTEMBER 2011 – REVISED APRIL 2013
www.ti.com
Table 3. De-emphasis and Output Voltage Settings (continued)
6
Float
Float
010
7
Float
R
011
8
Float
1
101
9
R
0
000
10
R
Float
010
11
R
R
011
12
R
1
101
13
1
0
000
14
1
Float
001
15
1
R
001
16
1
1
010
011
1000
- 3.5
011
1000
-6
011
1000
-9
101
1200
-0
101
1200
- 3.5
101
1200
-6
101
1200
-9
100
1100
0
100
1100
- 1.5
110
1300
- 1.5
110
1300
- 3.5
Note: The DS64BR111 VOD for OUTPUT A is limited to 700 mV in pin mode (ENSMB=0). With ENSMB = 1 or
FLOAT, the VOD for OUTPUT A can be adjusted with SMBus register 0x23 [4:2] as shown in the SMBus
Register Table.
Note: In SMBus Mode if VOD_SEL is in the Logic 1 state (1K resistor to VIN/VDD) the DS64BR111 AD0-AD3
pins are internally forced to 0'h
Table 4. Signal Detect Threshold Level
SD_TH
SMBus REG bit
[3:2] and [1:0]
Assert Level (Typical)
0
10
210 mV
20K to GND
01
160 mV
Float (Default)
00
180 mV
1
11
190 mV
Note: VDD = 2.5V, 25°C, and 010101 pattern at 6.4 Gbps
De-assert Level (Typical)
150 mV
100 mV
110 mV
130 mV
12
Submit Documentation Feedback
Product Folder Links: DS64BR111
Copyright © 2011–2013, Texas Instruments Incorporated