DS64BR111_13 Datasheet, PDF (20/39 Pages) Texas Instruments – DS64BR111 Ultra Low Power 6.4 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis

DS64BR111
SNLS343C – SEPTEMBER 2011 – REVISED APRIL 2013
www.ti.com
Table 7. Single EEPROM Header + Register Map with Default Value
EEPROM
Address Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Description ^{0 CRC EN}
Address Map EEPROM > RES
Present
256 Bytes
COUNT[3] COUNT[2] COUNT[1] COUNT[0]
Value
0
0
0
0
0
0
0
0
Description 1 RES
RES
RES
RES
RES
RES
RES
RES
Value
0
0
0
0
0
0
0
0
2 Max
Max
Max
Max
Max
Max
Max
Max
Description
EEPROM EEPROM EEPROM EEPROM EEPROM EEPROM EEPROM EEPROM
Burst size[7] Burst size[6] Burst size[5] Burst size[4] Burst size[3] Burst size[2] Burst size[1] Burst size[0]
Value
0
0
0
0
0
0
0
0
Description 3 Reserved
Register
0x01[7]
Value
0
Description 4 Ovrd_LOS
Reserved
0x01[6]
0
LOS_Value
Reserved
0x01[5]
0
PDWN Inp
Register
0x02[5]
0x02[4]
0x02 [3]
Value
0
0
0
Description 5 TX_DIS CHA TX_DIS CHB Reserved
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
Description
Register
Value
0x04 [4]
0
6 Ovrd_IDLE
0x08 [4]
0
7 Reserved
0x0B[3]
0
8 CHA EQ[7]
0x0F [7]
0
9 A Sel scp
0x10 [7]
1
10 DEMA[2]
0x11 [2]
0
11 Idle auto B
0x15 [5]
0
12 CHB EQ[3]
0x16 [3]
1
13 Reserved
0x17 [3]
1
14 IDLE thA[1]
0x19 [3]
0
0x04 [3]
0
Reserved
0x08[3]
0
Reserved
0x0B[2]
0
CHA EQ[6]
0x0F [6]
0
A Out Mode
0x10 [6]
1
DEMA[1]
0x11 [1]
1
Idle sel B
0x15 [4]
0
CHB EQ[2]
0x16 [2]
1
Reserved
0x17[2]
1
IDLE thA[0]
0x19 [2]
0
0x04 [2]
0
Reserved
0x08 [2]
0
Reserved
0x0B[1]
0
CHA EQ[5]
0x0F [5]
1
Reserved
0x10 [5]
1
DEMA[0]
0x11 [0]
0
Reserved
0x15[3]
0
CHB EQ[1]
0x16 [1]
1
Reserved
0x17[1]
0
IDLE thD[1]
0x19 [1]
0
Reserved
0x01[4]
0
PWDN Osc
0x02 [2]
0
EQ Stage 4
CHB
0x04 [1]
0
Reserved
0x08[1]
0
Reserved
0x0B[0]
0
CHA EQ[4]
0x0F [4]
0
Reserved
0x10 [4]
0
CHA Slow
0x12 [7]
0
Reserved
0x15[2]
0
CHB EQ[0]
0x16 [0]
1
Reserved
0x17[0]
1
IDLE thD[0]
0x19 [0]
0
Reserved
0x01[3]
0
Reserved
0x02 [0]
0
EQ Stage 4
CHA
0x04 [0]
0
Reserved
0x08[0]
0
Idle auto A
0x0E [5]
0
CHA EQ[3]
0x0F [3]
1
Reserved
0x10 [3]
1
IDLE thA[1]
0x12 [3]
0
CHB EQ[7]
0x16 [7]
0
B Sel scp
0x17 [7]
1
CHB DEM[2]
0x18 [2]
0
Reserved
Reserved
0x01[2]
0
eSATA
Enable A
0x04 [7]
0
Reserved
0x06[4]
1
Reserved
0x0B[6]
1
Idle sel A
0x0E [4]
0
CHA EQ[2]
0x0F [2]
1
Reserved
0x10[2]
1
IDLE thA[0]
0x12 [2]
0
CHB EQ[6]
0x16 [6]
0
B Out Mode
0x17 [6]
1
CHB DEM[1]
0x18 [1]
1
Reserved
Reserved
0x01 [1]
0
eSATA
Enable B
0x04 [6]
0
Overide
IDLE_th
0x08 [6]
0
Reserved
0x0B[5]
1
Reserved
0x0E[3]
0
CHA EQ[1]
0x0F [1]
1
Reserved
0x10[1]
0
IDLE thD[1]
0x12 [1]
0
CHB EQ[5]
0x16 [5]
1
Reserved
0x17 [5]
1
CHB DEM[0]
0x18 [0]
0
Reserved
Reserved
0x01 [0]
0
Ovrd TX_DIS
0x04 [5]
0
Reserved
0x08 [5]
0
Reserved
0x0B[4]
1
Reserved
0x0E[2]
0
CHA EQ[0]
0x0F [0]
1
Reserved
0x10[0]
1
IDLE thD[0]
0x12 [0]
0
CHB EQ[4]
0x16 [4]
0
Reserved
0x17 [4]
0
CHB Slow
0x19 [7]
0
Reserved
0
0
0
0
20
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