TM4C129LNCZAD Datasheet, PDF (248/2140 Pages) Texas Instruments – Tiva Microcontroller

System Control
If the main oscillator provides the clock reference to the PLL, the translation provided by hardware
and used to program the PLL is available for software in the PLL Frequency n (PLLFREQn) registers
(see page 302). The internal translation provides a translation within ± 1% of the targeted PLL VCO
frequency. Table 5-7 on page 248 shows the actual PLL frequency and error for a given crystal
choice.
Table 5-7 on page 248 provides examples of the programming expected for the PLLFREQ0 and
PLLFREQ1 registers. The first column specifies the input crystal frequency and the last column
displays the PLL frequency given the values of MINT and N, when Q=0.
Table 5-7. Actual PLL Frequency^a
Crystal
MINT (Decimal MINT (Hexadecimal
N
Frequency
Value)
Value)
(MHz)
Reference
Frequency
(MHz)^b
PLL Frequency
(MHz)
5
64
0x40
0x0
5
320
6
160
0x35
0x2
2
320
8
40
0x28
0x0
8
320
10
32
0x20
0x0
10
320
12
80
0x50
0x2
4
320
16
20
0x14
0x0
16
320
18
160
0xA0
0x8
2
320
20
16
0x10
0x0
20
320
24
40
0x28
0x2
8
320
25
64
0x40
0x4
5
320
5
96
0x60
0x0
5
480
6
80
0x50
0x0
6
480
8
60
0x3C
0x0
8
480
10
48
0x30
0x0
10
480
12
40
0x28
0x0
12
480
16
30
0x1E
0x0
16
480
18
80
0x50
0x2
6
480
20
24
0x18
0x0
20
480
24
20
0x14
0x0
24
480
25
96
0x60
0x4
5
480
a. For all examples listed, Q=0
b. For a given crystal frequency, N should be chosen such that the reference frequency is within 4 to 30 MHz.
PLL Operation
If a PLL configuration is changed, the PLL output frequency is unstable until it reconverges (relocks)
to the new setting. The time between the configuration change and relock is T_READY (see Table
31-16 on page 2068). During the relock time, the affected PLL is not usable as a clock reference.
Software can poll the LOCK bit in the PLL Status (PLLSTAT) register to determine when the PLL
has locked.
Modification of the PLL VCO frequency may not be performed while the PLL serves as a clock
source to the system. All changes to the PLL must be performed using a different clock source until
the PLL has locked frequency. Thus, changing the PLL VCO frequency must be done as a sequence
from PLL to PIOSC/MOSC and then PIOSC/MOSC to new PLL.
248
June 18, 2014
Texas Instruments-Production Data