TM4C129LNCZAD Datasheet, PDF (1835/2140 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129LNCZAD Microcontroller
Bit/Field
25
24
23
22
21:20
Name
TFT24
FRMBUFSZ
TFTMAP
NIBMODE
PALMODE
Type
RW
RW
RW
RW
RW
Reset
0
Description
24-Bit TFT Mode
Value Description
0 24-Bit TFT Mode disabled. Palette RAM lookup is used for
output pixel data.
1 24-Bit TFT Mode enabled. 24-bit data in TFT Active mode. The
format of the framebuffer data depends on TFT24UPCK.
0
Frame Buffer Select
This mode is valid when LCDTFT is 0 and there are 16 bpp raw data
frame buffers (bpp=00)
Only for this case, this bit selects whether the frame buffer format is 16
bpp 565 or 12bpp.
The Grayscaler can only take 12 bits per pixel. The frame buffer data
is 16 bits per pixel 565 when FRMBUFSZ is set to 1 and only the 4 most
significant bits of each color component are sent to the Grayscaler input.
Value Description
0 Framebuffer is 12 bpp packed in bits [11:0]
1 Framebuffer is 16 bpp 565
0
TFT Mode Alternate Signal Mapping for Palettized Framebuffer
This bit be 0 for all 12/16/24-bpp raw data formats. This bit can only be
1 for 1/2/4/8-bpp Palette Lookup data. Valid only in Active Matrix mode
when LCDTFT=1.
Value Description
0 4 bits per component output data for 1, 2, 4, and 8 bpp modes
will be right aligned on LCDDATA[11:0]
1 4 bits per component output data for 1, 2, 4, and 8 bpp will be
converted to 5,6,5, format and use LCDDATA[15:0]={R3 R2
R1 R0 R3 G3 G2 G1 G0 G3 G2 B3 B2 B1 B0 B3}
0
Nibble Mode
This bit is used to determine palette indexing and is used in conjunction
with RDORDER.
Value Description
0 Nibble mode is disabled
1 Nibble mode is enabled
0x0
Pallette Loading Mode
For Raw Data (12/16/24 bpp) frame buffers, no Palette lookup is
employed. Thus, these frame buffers use the Data-Only loading mode.
Value Description
0x0 Palette and data loading, reset value
0x1 Palette loading only
0x2 Data loading only.
June 18, 2014
Texas Instruments-Production Data
1835