English
Language : 

DS90C387_15 Datasheet, PDF (24/33 Pages) Texas Instruments – Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA
DS90C387, DS90CF388
SNLS012H – MAY 2000 – REVISED APRIL 2013
www.ti.com
RSKMD - Receiver Skew Margin with DESKEW
RSKMD is a chipset parameter and is applicable when the DESKEW feature of the DS90CF388 is employed. It
is the difference between the receiver’s strobe window and the ideal pulse locations. The DESKEW feature
adjusts for skew between each data channel and the clock channel. This feature is supported up to 80 MHz clock
rate. RSKMD must be greater than the summation of: Transmitter’s Pulse Position variance, LVDS Source Clock
Jitter (TJCC), and ISI (if any). See Figure 12. With Deskew, RSKMD is ≥ 25% of TBIT. Deskew compensates for
interconnect skew which includes PCB traces differences, connector skew and cable skew (for a cable
application). PCB trace and connector skew can be compensated for in the design of the system. Note, cable
skew is media type and length dependant. Cable length may be limited by the RSKMD parameter prior to the
interconnect skew reaching 1 TBIT in length due to ISI effects.
POWER DOWN
Both transmitter and receiver provide a power down feature. When asserted current draw through the supply pins
is minimized and the PLLs are shut down. The transmitter outputs are in TRI-STATE when in power down mode.
The receiver outputs are forced to a active LOW state when in the power down mode. (See Transmitter Pin
Descriptions and Receiver Pin Descriptions). The PD pin should be driven HIGH to enable the device once VCC
is stable.
DS90C387A/DS90CF388A
The DS90C387/CF388 chipset is electrically similar to the DS90C387A/CF388A. The DS90C387A/CF388A is
recommended if support of longer cable drive is not required. DC Balance data transmission and cable deskew
features are disabled to minimize overall power dissipation. The devices will also directly inter-operate with
existing FPD-Link devices for backward compatibility.
Configuration Table
Pin
R_FB (Tx only)
R_FDE (both Tx and Rx)
BAL (both Tx and Rx)
DUAL (Tx only)
Table 7. TRANSMITTER / RECEIVER CONFIGURATION TABLE
Condition
R_FB = VCC
R_FB = GND
R_FDE = VCC
R_FDE = GND
BAL=VCC
BAL=Gnd
DUAL=VCC
DUAL=1/2VCC
DUAL=Gnd
Configuration
Rising Edge Data Strobe
Falling Edge Data Strobe
Active data DE = High
Active data DE = Low
DC Balanced enabled
DC Balanced disabled (backward compatible to FPD-Link)
48-bit color (dual pixel) support
Single-to-dual support
24-bit color (single pixel) support
24
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: DS90C387 DS90CF388