DS90C387_15 Datasheet, PDF (14/33 Pages) Texas Instruments – Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA

DS90C387, DS90CF388
SNLS012H – MAY 2000 – REVISED APRIL 2013
www.ti.com
DS90CF388 PIN DESCRIPTIONS — FPD LINK RECEIVER (continued)
Pin Name
BAL
DESKEW
PD
I/O No.
Description
I
1 Mode select for DC Balanced (new) or non-DC Balanced (backward compatible) interface. BAL =
LOW for non-DC Balanced mode. BAL = HIGH for DC Balanced Mode (Auto-detect mode), with this
pin HIGH the received LVDS clock signal is used to determine if the interface is in new or backward
compatible mode. ^{(1) (2) (4)}
I
1 Deskew and oversampling “on/off” select. Deskew is active when input is high. Only supported in DC
Balance mode (BAL=High). To complete the deskew operation, a minimum of four clock cycles is
required during blanking time. ⁽¹⁾
I
1 TTL level input. When asserted (low input) the receiver data outputs are low and clock output is high.
(1)
STOPCLK
V_CC
GND
PLLV_CC
PLLGND
LVDSV_CC
LVDSGND
CNTLE, CNTLF
O
1 Indicates receiver clock input signal is not present with a logic high. With a clock input present, a low
logic is indicated.
I
6 Power supply pins for TTL outputs and digital circuitry.
I
8 Ground pins for TTL outputs and digital circuitry
I
1 Power supply for PLL circuitry.
I
2 Ground pin for PLL circuitry.
I
2 Power supply pin for LVDS inputs.
I
3 Ground pins for LVDS inputs.
O
2 TTL level data outputs. User-defined control signals - no connect when not used.
(4) The DS90CF388 is designed to automatically detect the DC Balance or non-DC Balance transmitted data from the DS90C387 and
deserialize the LVDS data according to the defined bit mapping.
Recommend using R1=R2=10kΩ for single to dual mode
Figure 16. Resistor Network for “DUAL” pin input
LVDS Interface
Table 1. LVDS DATA BIT NAMING CONVENTION
X
X=R
X=G
X=B
Y
Z
Y=1
Y=2
Z=0-7
Description
Red
Green
Blue
Odd (First) Pixel
Even (Second) Pixel
LVDS bit number (not VGA controller LSB to MSB)
Table 2. SINGLE PIXEL PER CLOCK INPUT APPLICATION DATA MAPPING (DUAL=GND)
VGA - TFT Data Signals Color Bits
24-bit
18-bit
LSB
R0
R1
R2
R0
Transmitter input pin names
DS90C387
R16
R17
R10
Receiver output pin names
DS90CF388
R16
R17
R10
TFT Panel Data
Signals
18-bit
24-bit
R0
R1
R0
R2
14
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