LMH2190 Datasheet, PDF (18/32 Pages) National Semiconductor (TI) – Quad Channel 27 MHz Clock Tree Driver with I2C Interface

LMH2190
SNAS473H – JUNE 2009 – REVISED MAY 2013
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V_DD
EN
TCXO
CLK_OUT
GND
V_OUT
LMH2190
SCLK_REQ
SCLK_IN
Figure 25. TCXO Powered from LMH2190's LDO
Note that the LMH2190 initializes to its default settings when V_BAT is powered-up. As a consequence, the
LMH2190 is in it's default state until it is configured through I²C. Because of this configuration the CLK1/2/3/4
outputs may transmit the clock to a peripheral upon startup when it is not requested by the peripheral and before
the device is initialized through the I²C port. This may happen for instance when the default settings of the device
for SCLK_REQ and CLK_REQ1/2/3/4 polarities do not correspond to what is expected by the TCXO and the
peripheral. Care must be taken to prevent any unwanted behavior in the peripheral device until the I²C port
correctly configures the device. The setting of the registers is maintained as long as the V_BAT voltage is present.
LOW DROPOUT REGULATOR
The linear and low dropout regulator (LDO) is used to regulate the input voltage, V_BAT, to generate an accurate
1.8V supply voltage. This allows the LMH2190 to suppress V_BAT voltage ripples. A voltage ripple would distort
clock edges causing phase noise on the distributed clock signal.
In default mode the LDO is powered-up when one or more Clock Request inputs are high. Therefore the Clock
Request Logic needs to be powered continuously such that it can wake-up the LMH2190 and its LDO. The
V_{DD_IO} voltage that takes care of supplying the Clock Request Logic can therefore be driven by either the LDO
output voltage or the ENABLE signal. Normally the V_{DD_IO} signal is connected to the LDO output, unless the LDO
is in a low power shutdown mode. In that case the ENABLE signal will drive V_{DD_IO} (Figure 26). As soon as there
is a clock request, the built in LDO will power up and takes over the sourcing of V_{DD_IO} from the ENABLE signal.
CLKx ENABLE
V_BAT
LDO MODE
REG00-Bit5:6
LDO
V_BAT V_OUT
LDO_EN
V_OUT
1
0
V_{DD_IO}
OFF
00
01
10
11
ON
SD LOGIC
ENABLE
THERMAL
SHUTDOWN
TSD
REG05-Bit0
Figure 26. Linear Regulator Block Diagram
The LDO contains thermal overheating detection. If it does overheat, the LMH2190 (except the register logic) will
shutdown and sets a status bit in the I²C status register.
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