THS788 Datasheet, PDF (11/43 Pages) Texas Instruments – QUAD-CHANNEL TIME MEASUREMENT UNIT (TMU)

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THS788
SLOS616B – MARCH 2010 – REVISED JUNE 2011
Hstrobe
HCLK
1
2
3
4
5
6
7
8
9 10 11 12 13 14
24 25 26 27 28 29
1^st clock for next
transaction = 30
Hdata
R₁ /W 0
A7 A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 D12
Register Address (A7:A0)
Data In
D2 D1 D0 w0 X
X R/W
Data transfer protocol for single write operation
Figure 4. Write Operation
T0425-01
Write Operations to Multiple Destinations
This is similar to the single-write operation except the parallel-load bit is set to 1.
Hstrobe
HCLK
1
2
3
4
5
6
7
8
9 10 11 12 13 14
24 25 26 27 28 29
1^st clock for next
transaction = 30
Hdata
R₁ /W 1 A7 A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 D12
Register Address (A7:A0)
Data In
D2 D1 D0 w0 X X R/W
Data transfer protocol for parallel write operation
Figure 5. Write Operations to Multiple Destinations
T0426-01
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