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DS90CR483A_15 Datasheet, PDF (11/27 Pages) Texas Instruments – 48-Bit LVDS Channel Link SER/DES - 33 - 112 MHz
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LVDS Interface
DS90CR483A, DS90CR484A
SNLS291A – APRIL 2008 – REVISED APRIL 2013
Figure 15. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Enabled
Optional features supported: Pre-emphasis, and Deskew
Figure 16. 48 Parallel TTL Data Bits Mapped to LVDS Outputs with DC Balance Disabled
Optional feature supported: Pre-emphasis
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