DS100MB201_16 Datasheet, PDF (10/26 Pages) Texas Instruments – Dual Lane 2:1/1:2 Mux/Buffer with Equalization

DS100MB201
SNLS333A – APRIL 2011 – REVISED APRIL 2013
Device Connection Paths
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The lanes of the DS100MB201 can be configured either as a 2:1 multiplexer, 1:2 switch or fan-out buffer. The
controller side is muxed to the disk drive side. The below table shows the logic for the multiplexer and switch
functions.
FANOUT
0
SEL0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
SEL1
0
1
0
1
0
1
0
1
Table 3. Logic Table of Switch and Mux Control
Function — connection path
DOUT0 connects to SIB0.
DOUT1 connects to SIB1.
DIN0 connects to SOB0. SOA0 is in idle (output muted).
DIN1 connects to SOB1. SOA1 is in idle (output muted).
DOUT0 connects to SIB0.
DOUT1 connects to SIA1.
DIN0 connects to SOB0. SOA0 is in idle (output muted).
DIN1 connects to SOA1. SOB1 is in idle (output muted).
DOUT0 connects to SIA0.
DOUT1 connects to SIB1.
DIN0 connects to SOA0. SOB0 is in idle (output muted).
DIN1 connects to SOB1. SOA1 is in idle (output muted).
DOUT0 connects to SIA0.
DOUT1 connects to SIA1.
DIN0 connects to SOA0. SOB0 is in idle (output muted).
DIN1 connects to SOA1. SOB1 is in idle (output muted).
DOUT0 connects to SIB0.
DOUT1 connects to SIB1.
DIN0 connects to SOB0 and SOA0.
DIN1 connects to SOB1 and SOA1.
DOUT0 connects to SIB0.
DOUT1 connects to SIA1.
DIN0 connects to SOB0 and SOA0.
DIN1 connects to SOA1 and SOB1.
DOUT0 connects to SIA0.
DOUT1 connects to SIB1.
DIN0 connects to SOA0 and SOB0.
DIN1 connects to SOB1 and SOA1.
DOUT0 connects to SIA0.
DOUT1 connects to SIA1.
DIN0 connects to SOA0 and SOB0.
DIN1 connects to SOA1 and SOB1.
System Management Bus (SMBus) and Configuration Registers
The System Management Bus interface is compatible to SMBus 2.0 physical layer specification. ENSMB must be
pulled high to enable SMBus mode and allow access to the configuration registers.
The DS100MB201 has the AD[3:0] inputs in SMBus mode. These pins set the SMBus slave address inputs. The
AD[3:0] pins have internal pull-down. When left floating or pulled low the AD[3:0] = 0000'b, the device default
address byte is A0'h. Based on the SMBus 2.0 specification, the DS100MB201 has a 7-bit slave address of
1010000'b. The LSB is set to 0'b (for a WRITE), thus the 8-bit value is 1010 0000'b or A0'h. The bold bits
indicate the AD[3:0] pin map to the slave address bits [4:1]. The device address byte can be set with the use of
the AD[3:0] inputs. Below are some examples.
AD[3:0] = 0001'b, the device address byte is A2'h
AD[3:0] = 0010'b, the device address byte is A4'h
AD[3:0] = 0100'b, the device address byte is A8'h
AD[3:0] = 1000'b, the device address byte is B0'h
The SDA, SCL pins are 3.3V tolerant, but are not 5V tolerant. External pull-up resistor is required on the SDA.
The resistor value can be from 1 kΩ to 5 kΩ depending on the voltage, loading and speed. The SCL may also
require an external pull-up resistor and it depends on the Host that drives the bus.
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