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OMAPL137DZKB3 Datasheet, PDF (83/223 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor
OMAP-L137
www.ti.com
SPRS563F – SEPTEMBER 2008 – REVISED FEBRUARY 2013
Table 5-15. EDMA3 Channel Controller (EDMA3CC) Registers (continued)
BYTE ADDRESS
0x01C0 2228
0x01C0 2230
0x01C0 2238
0x01C0 2240
0x01C0 2250
0x01C0 2258
0x01C0 2260
0x01C0 2268
0x01C0 2270
0x01C0 2278
0x01C0 2280
0x01C0 2284
0x01C0 2288
0x01C0 228C
0x01C0 2290
0x01C0 2294
0x01C0 4000 - 0x01C0 4FFF
ACRONYM
EECR
EESR
SER
SECR
IER
IECR
IESR
IPR
ICR
IEVAL
QER
QEER
QEECR
QEESR
QSER
QSECR
—
REGISTER DESCRIPTION
Event Enable Clear Register
Event Enable Set Register
Secondary Event Register
Secondary Event Clear Register
Interrupt Enable Register
Interrupt Enable Clear Register
Interrupt Enable Set Register
Interrupt Pending Register
Interrupt Clear Register
Interrupt Evaluate Register
QDMA Event Register
QDMA Event Enable Register
QDMA Event Enable Clear Register
QDMA Event Enable Set Register
QDMA Secondary Event Register
QDMA Secondary Event Clear Register
Parameter RAM (PaRAM)
Table 5-16. EDMA3 Transfer Controller (EDMA3TC) Registers
Transfer Controller 0
BYTE ADDRESS
0x01C0 8000
0x01C0 8004
0x01C0 8100
0x01C0 8120
0x01C0 8124
0x01C0 8128
0x01C0 812C
0x01C0 8130
0x01C0 8140
0x01C0 8240
0x01C0 8244
0x01C0 8248
0x01C0 824C
0x01C0 8250
0x01C0 8254
0x01C0 8258
0x01C0 825C
0x01C0 8260
0x01C0 8280
0x01C0 8284
0x01C0 8288
0x01C0 8300
0x01C0 8304
0x01C0 8308
0x01C0 830C
0x01C0 8310
Transfer Controller 1
BYTE ADDRESS
0x01C0 8400
0x01C0 8404
0x01C0 8500
0x01C0 8520
0x01C0 8524
0x01C0 8528
0x01C0 852C
0x01C0 8530
0x01C0 8540
0x01C0 8640
0x01C0 8644
0x01C0 8648
0x01C0 864C
0x01C0 8650
0x01C0 8654
0x01C0 8658
0x01C0 865C
0x01C0 8660
0x01C0 8680
0x01C0 8684
0x01C0 8688
0x01C0 8700
0x01C0 8704
0x01C0 8708
0x01C0 870C
0x01C0 8710
ACRONYM
REGISTER DESCRIPTION
PID
TCCFG
TCSTAT
ERRSTAT
ERREN
ERRCLR
ERRDET
ERRCMD
RDRATE
SAOPT
SASRC
SACNT
SADST
SABIDX
SAMPPRXY
SACNTRLD
SASRCBREF
SADSTBREF
DFCNTRLD
DFSRCBREF
DFDSTBREF
DFOPT0
DFSRC0
DFCNT0
DFDST0
DFBIDX0
Peripheral Identification Register
EDMA3TC Configuration Register
EDMA3TC Channel Status Register
Error Status Register
Error Enable Register
Error Clear Register
Error Details Register
Error Interrupt Command Register
Read Command Rate Register
Source Active Options Register
Source Active Source Address Register
Source Active Count Register
Source Active Destination Address Register
Source Active B-Index Register
Source Active Memory Protection Proxy Register
Source Active Count Reload Register
Source Active Source Address B-Reference Register
Source Active Destination Address B-Reference Register
Destination FIFO Set Count Reload Register
Destination FIFO Set Source Address B-Reference Register
Destination FIFO Set Destination Address B-Reference Register
Destination FIFO Options Register 0
Destination FIFO Source Address Register 0
Destination FIFO Count Register 0
Destination FIFO Destination Address Register 0
Destination FIFO B-Index Register 0
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Peripheral Information and Electrical Specifications
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