DAC8734_091 Datasheet, PDF (7/41 Pages) Texas Instruments – Quad, 16-Bit, High-Accuracy, ±16V Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC8734
www.ti.com .................................................................................................................................................. SBAS465A – MAY 2009 – REVISED SEPTEMBER 2009
PIN CONFIGURATIONS
RHA PACKAGE⁽¹⁾
QFN-40
(TOP VIEW)
PFB PACKAGE
TQFP-48
(TOP VIEW)
CS 1
SCLK 2
SDI 3
SDO 4
LDAC 5
RST 6
GPIO-0 7
GPIO-1 8
UNI/BIP-A 9
DGND 10
DAC8734
30 AV_DD
29 V_MON
28 AV_SS
27 REFGND-B
26 REF-B
25 REF-A
24 REFGND-A
23 AV_SS
22 AGND
21 AV_DD
NC 1
CS 2
SCLK 3
SDI 4
SDO 5
LDAC 6
RST 7
GPIO-0 8
GPIO-1 9
UNI/BIP-A 10
DGND 11
NC 12
DAC8734
36 NC
35 AV_DD
34 V_MON
33 AV_SS
32 REFGND-B
31 REF-B
30 REF-A
29 REFGND-A
28 AV_SS
27 AGND
26 AV_DD
25 NC
(1) The thermal pad is internally connected to
the substrate. This pad can be connected
to AV_SS or left floating.
PIN
NAME
CS
SCLK
SDI
SDO
LDAC
RST
GPIO-0
GPIO-1
UNI/BIP-A
DGND
IOV_DD
DV_DD
V_OUT-0
PIN NO.
QFN-40
TQFP-48
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
13
12
14
13
15
PIN DESCRIPTIONS
I/O
DESCRIPTION
I
SPI bus chip select input (active low). Data are not clocked into the SPI shift register unless CS is
low. When CS is high, SDO is in a high-impedance state.
I SPI bus clock
I SPI bus input data
O SPI output data
Load DAC latch control input (active low). When LDAC is low, the DAC latch is transparent and the
I contents of the Input Data Register are transferred to it. The DAC output changes to the
corresponding level simultaneously when the DAC latch is updated.
I
Reset input (active low). Logic low on this pin resets the input registers and DACs to the values
defined by the UNI/BIP pins, and sets the Gain Register and Zero Register to default values.
General-purpose digital input/output 0. This pin is a bidirectional, digital input/output, and has an
I/O open-drain output. A 10kΩ pull-up resistor to IOV_DD is needed when this pin is used as an output.
See the GPIO Pins section for details.
General-purpose digital input/output 1. This pin is a bidirectional, digital input/output, and has an
I/O open-drain output. A 10kΩ pull-up resistor to IOV_DD is needed when this pin is used as an output.
See the GPIO Pins section for details.
Output mode selection of group A (DAC-0 and DAC-1). When UNI/BIP-A is tied to IOV_DD, group A
I
is in unipolar output mode; when tied to DGND, group A is in bipolar output mode. The input data
written to the DAC are straight binary for unipolar output mode and twos complement for bipolar
output mode.
I Digital ground
I Interface power
I Digital power
O DAC-0 output
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): DAC8734
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