DAC8734_091 Datasheet, PDF (5/41 Pages) Texas Instruments – Quad, 16-Bit, High-Accuracy, ±16V Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC8734
www.ti.com .................................................................................................................................................. SBAS465A – MAY 2009 – REVISED SEPTEMBER 2009
ELECTRICAL CHARACTERISTICS (continued)
All specifications at T_A = T_MIN to T_MAX, AV_DD = +11V to +18V, AV_SS = –11V to –18V, V_REF = REF-A = REF-B = +5V,
DV_DD = +5V, IOV_DD = +1.8V to DV_DD, AGND = DGND = REFGND-A = REFGND-B = SGND-x = 0V, and DAC gain = 4, unless
otherwise noted.
PARAMETER
CONDITIONS
DIGITAL INPUTS⁽¹³⁾ (SDI, CS, SCLK, RST, UNI/BIP-A, UNI/BIP-B, LDAC, GPIO-x)
High-level input voltage, V_IH
Low-level input voltage, V_IL
Input current
IOV_DD = 4.5V to 5.5V
IOV_DD = 2.7V to 3.3V
IOV_DD = +1.8V
IOV_DD = 4.5V to 5.5V
IOV_DD = 2.7V to 3.3V
IOV_DD = +1.8V
Input capacitance
DIGITAL OUTPUTS⁽¹³⁾ (SDO, GPIO-x)
SDO high-level output voltage,
V_OH
SDO low-level output voltage,
V_OL
SDO high-impedance leakage
IOV_DD = 2.7V to 5.5V, sourcing 1mA
IOV_DD = +1.8V, sourcing 200µA
IOV_DD = 2.7V to 5.5V, sinking 1mA
IOV_DD = +1.8V, sinking 200µA
SDO high-impedance output
capacitance
GPIO low-level output voltage,
V_OL
GPIO open-drain high-level
output leakage current
IOV_DD = 2.7V to 5.5V, sinking 1mA
IOV_DD = +1.8V, sinking 1mA
GPIO in Hi-Z and configured as output
POWER SUPPLY
AV_DD ⁽¹⁴⁾
AV_SS ⁽¹⁵⁾
DV_DD
IOV_DD
AI_DD (normal operation)
AI_DD (power-down)
AI_SS (normal operation)
AI_SS (power-down)
DI_DD
IOI_DD
Power dissipation (normal
operation)
±10V output range, no loading current, V_OUT = 0V
±10V output range, no loading current, V_OUT = 0V
Static current through the DV_DD pin with V_IH = IOV_DD and
V_IL = DGND
V_IH = IOV_DD, V_IL = DGND
±12V power, no loading current, V_OUT = 0V
TEMPERATURE RANGE
Specified performance
DAC8734
MIN
TYP
MAX
2.5
2.1
1.6
–0.3
–0.3
–0.3
IOV_DD + 0.3
IOV_DD + 0.3
IOV_DD + 0.3
0.8
0.6
0.2
1
5
IOV_DD – 0.4
1.6
0.4
0.2
1
10
0
0.4
0
0.4
1
UNIT
V
V
V
V
V
V
µA
pF
V
V
V
V
µA
pF
V
V
µA
+4.75
–18
+2.7
+1.7
2.7
3.3
25
±1
290
+24
–4.75
+5.5
DV_DD
3.4
100
4.0
100
V
V
V
V
mA/Channel
µA
mA/Channel
µA
50
µA
±10
µA
mW
–40
+105
°C
(13) Specified by design and characterization.
(14) AV_DD should not be greater than +24V or less than +4.75V. Also, AV_DD should not be less than ( 2 × V_REF + 1V) for bipolar output mode
and should not be less than (Gain × V_REF + 1V) for unipolar output mode. In any case, (AV_DD – AV_SS) ≤ +36V.
(15) AV_SS should not be greater than –4.75V or less than –18V. Also, AV_SS should not be greater than (–2 × V_REF – 1V). In any case, (AV_DD
– AV_SS) ≤ +36V.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): DAC8734
Submit Documentation Feedback
5