DAC8734_091 Datasheet, PDF (28/41 Pages) Texas Instruments – Quad, 16-Bit, High-Accuracy, ±16V Output, Serial Input DIGITAL-TO-ANALOG CONVERTER

DAC8734
SBAS465A – MAY 2009 – REVISED SEPTEMBER 2009 .................................................................................................................................................. www.ti.com
Zero Register n (where n = 0, 1, 2, or 3). Default = 0000h.
The Zero Register stores the user-calibration data that are used to eliminate the offset error. The data are nine
bits wide, 0.125 LSB/step, and the total adjustment is typically –32 LSB to +31.875 LSB, or ±0.0488% of
full-scale range. The Zero Register uses a twos complement data format in both bipolar and unipolar modes of
operation.
Table 9. Zero Register
DB15:DB9
Reserved ⁽¹⁾
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Z8
Z7
Z6
Z5
Z4
Z3
Z2
Z1
Z0
(1) Writing to a reserved bit has no effect; reading the bit returns '0'.
Z8:Z0—OFFSET BITS
011111111
011111110
••• ••• •••
000000001
000000000
111111111
••• ••• •••
100000001
100000000
ZERO ADJUSTMENT
+31.875 LSB
+31.750 LSB
••• ••• •••
+0.125 LSB
0 LSB (default)
–0.125 LSB
••• ••• •••
–31.875 LSB
–32 LSB
Gain Register n (where n = 0, 1, 2, or 3). Default = 0000h.
The Gain Register stores the user-calibration data that are used to eliminate the gain error. The data are eight
bits wide, 1 LSB/step, and the total adjustment is typically –128 LSB to +127 LSB, or ±0.195% of full-scale
range. The Gain Register uses a twos complement data format in both bipolar and unipolar modes of operation.
Table 10. Gain Register
DB15:DB8
Reserved ⁽¹⁾
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
G7
G6
G5
G4
G3
G2
G1
G0
(1) Writing to a reserved bit has no effect; reading the bit returns '0'.
G7:G0—GAIN-CODE BITS
01111111
01111110
••• ••• •••
00000001
00000000
11111111
••• ••• •••
10000001
10000000
GAIN ADJUSTMENT
+127 LSB
+126 LSB
••• ••• •••
+1 LSB
0 LSB (default)
–1 LSB
••• ••• •••
–127 LSB
–128 LSB
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