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BQ24296_15 Datasheet, PDF (6/55 Pages) Texas Instruments – bq2429x I2C Controlled 3-A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG
bq24296, bq24297
SLUSBP6B – SEPTEMBER 2013 – REVISED NOVEMBER 2014
www.ti.com
8 Specifications
8.1 Absolute Maximum Ratings(1)
Voltage
(with respect to GND)
Output sink current
Junction temperature
Storage temperature range, Tstg
VBUS (converter not switching)
PMID (converter not switching)
STAT, PG
BTST
SW
BAT, SYS (converter not switching)
SDA, SCL, INT, OTG, ILIM, REGN, TS, QON, CE , D+, D–,
PSEL
BTST TO SW
PGND to GND
INT, STAT, PG
MIN
–2
–0.3
–0.3
–0.3
–2
–0.3
–0.3
MAX
15 (2)
15 (2)
12
12
7
8 (Peak
for 20ns
duration)
6
7
UNIT
V
V
V
V
V
V
V
–0.3
7V
–0.3
0.3 V
6 mA
–40
150 °C
–65
150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground pin unless otherwise noted.
(2) VBUS is specified up to 16 V for a maximum of 24 hours under no load conditions.
8.2 ESD Ratings
V(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged device model (CDM), per JEDEC specification JESD22-
C101 (2)
VALUE
1000
250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
V
8.3 Recommended Operating Conditions
VIN
IIN
ISYS
VBAT
IBAT
Input voltage
Input current (VBUS)
Output current (SYS)
Battery voltage
Fast charging current
Discharging current with internal MOSFET
MIN
MAX
UNIT
3.9
6.2 (1)
V
3
A
3.5
A
4.4
V
3
A
5.5
A
TA
Operating free-air temperature range
–40
85
°C
(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BTST or SW pins. A tight
layout minimizes switching noise.
6
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