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BQ24296_15 Datasheet, PDF (35/55 Pages) Texas Instruments – bq2429x I2C Controlled 3-A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG
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bq24296, bq24297
SLUSBP6B – SEPTEMBER 2013 – REVISED NOVEMBER 2014
9.6.1.3 Charge Current Control Register REG02 [reset = 01100000, or 60]
Figure 31. Charge Current Control Register REG02 Format
7
6
ICHG[5]
ICHG[4]
R/W
R/W
LEGEND: R/W = Read/Write
5
ICHG[3]
R/W
4
ICHG[2]
R/W
3
ICHG[1]
R/W
2
ICHG[0]
R/W
1
BCOLD
R/W
0
FORCE_20PCT
R/W
Table 10. Charge Current Control Register REG02 Field Description
BIT
FIELD
Fast Charge Current Limit
Bit 7
ICHG[5]
Bit 6
ICHG[4]
Bit 5
ICHG[3]
Bit 4
ICHG[2]
Bit 3
ICHG[1]
Bit 2
ICHG[0]
Bit 1
BCOLD
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0
FORCE_20PCT R/W
RESET
0
1
1
0
0
0
0
0
DESCRIPTION
NOTE
2048 mA
1024 mA
512 mA
256 mA
128 mA
64 mA
Set Boost Mode temperature monitor
threshold voltage to disable boost mode
0 – Vbcold0 (Typ. 76% of REGN or -10°C
w/ 103AT thermistor )
1 – Vbcold1 (Typ. 79% of REGN or -20°C
w/ 103AT thermistor)
0 – ICHG as Fast Charge Current
(REG02[7:2]) and IPRECH as Pre-
Charge Current (REG03[7:4])
programmed
1 – ICHG as 20% Fast Charge Current
(REG02[7:2]) and IPRECH as 50% Pre-
Charge Current (REG03[7:4])
programmed
Offset: 512 mA
Range: 512 – 3008 mA (000000 –
100111)
Default: 2048 mA (011000)
Note: ICHG higher than 3008mA is
not supported
Default: Vbcold0 (0)
Default: ICHG as Fast Charge
Current (REG02[7:2]) and IPRECH
as Pre-Charge Current (REG03[7:4])
programmed (0)
9.6.1.4 Pre-Charge/Termination Current Control Register REG03 [reset = 00010001, or 0x11]
Figure 32. Pre-Charge/Termination Current Control Register REG03 Format
7
6
IPRECHG[3] IPRECHG[2]
R/W
R/W
LEGEND: R/W = Read/Write
5
IPRECHG[1]
R/W
4
IPRECHG[0]
R/W
3
ITERM[3]
R/W
2
ITERM[2]
R/W
1
ITERM[1]
R/W
0
ITERM[0]
R/W
Table 11. Pre-Charge/Termination Current Control Register REG03 Field Description
BIT FIELD
TYPE
Pre-Charge Current Limit
Bit 7 IPRECHG[3] R/W
Bit 6 IPRECHG[2] R/W
Bit 5 IPRECHG[1] R/W
Bit 4 IPRECHG[0] R/W
Termination Current Limit
Bit 3 ITERM[3]
R/W
Bit 2 ITERM[2]
R/W
Bit 1 ITERM[1]
R/W
Bit 0 ITERM[0]
R/W
RESET DESCRIPTION
0
1024 mA
0
512 mA
0
256 mA
1
128 mA
0
1024 mA
0
512 mA
0
256 mA
1
128 mA
NOTE
Offset: 128 mA,
Range: 128 mA – 2048 mA
Default: 256 mA (0001)
Offset: 128 mA
Range: 128 mA – 2048 mA
Default: 256 mA (0001)
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