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BQ24296_15 Datasheet, PDF (33/55 Pages) Texas Instruments – bq2429x I2C Controlled 3-A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG | |||
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bq24296, bq24297
SLUSBP6B â SEPTEMBER 2013 â REVISED NOVEMBER 2014
9.6 Register Map
9.6.1 I2C Registers
Address: 6BH. REG00-07 support Read and Write. REG08-0A are Read only.
9.6.1.1 Input Source Control Register REG00 [reset = 00110xxx, or 3x]
Figure 29. Input Source Control Register REG00 Format
7
6
EN_HIZ
VINDPM[3]
R/W
R/W
LEGEND: R/W = Read/Write
5
VINDPM[2]
R/W
4
VINDPM[1]
R/W
3
VINDPM[0]
R/W
2
IINLIM[2]
R/W
1
IINLIM[1]
R/W
0
IINLIM[0]
R/W
Table 8. Input Source Control Register REG00 Field Description
BIT FIELD
TYPE
RESET DESCRIPTION
Bit 7 EN_HIZ
R/W
0
0 â Disable, 1 â Enable
Input Voltage Limit
Bit 6 VINDPM[3] R/W
0
640 mV
Bit 5 VINDPM[2] R/W
1
320 mV
Bit 4 VINDPM[1] R/W
1
160 mV
Bit 3 VINDPM[0] R/W
0
80 mV
Input Current Limit (Actual input current limit is the lower of I2C and ILIM)
Bit 2 IINLIM[2]
R/W
x
Bit 1 IINLIM[1]
R/W
x
Bit 0 IINLIM[0]
R/W
x
000 â 100 mA, 001 â 150 mA,
010 â 500 mA, 011 â 900 mA, 100 â 1 A,
101 â 1.5 A,
110 â 2 A, 111 â 3A
NOTE
Default: Disable (0)
Offset 3.88 V, Range: 3.88 V â 5.08 V
Default: 4.36 V (0110)
bq24296
PSEL = Lo : 3 A (111)
PSEL = Hi : 100 mA (000) (OTG pin = Lo) or
500 mA (OTG pin = Hi)
bq24297
Default SDP : 100 mA (000) (OTG pin = Lo)
or 500 mA (OTG pin = Hi)
Default DCP/CDP: 3 A (111)
Default Divider 1 and 2 : 2 A (110)
Default Divider 3 : 1 A (100)
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Product Folder Links: bq24296 bq24297
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