BQ24296_15 Datasheet, PDF (4/55 Pages) Texas Instruments – bq2429x I2C Controlled 3-A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG

bq24296, bq24297
SLUSBP6B – SEPTEMBER 2013 – REVISED NOVEMBER 2014
7 Pin Configuration and Functions
24-Pin VQFN
RGE Package
(Top View)
24 23 22 21 20 19
VBUS 1
PSEL 2
PG 3
STAT 4
SCL 5
SDA 6
bq24296
18 PGND
17 PGND
16 SYS
15 SYS
14 BAT
13 BAT
7 8 9 10 11 12
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24-Pin VQFN
RGE Package
(Top View)
24 23 22 21 20 19
VBUS 1
D+ 2
D– 3
STAT 4
SCL 5
SDA 6
bq24297
18 PGND
17 PGND
16 SYS
15 SYS
14 BAT
13 BAT
7 8 9 10 11 12
bq24296
VBUS
PIN
bq24297
VBUS
PSEL
–
PSEL
D+
PG
–
–
D–
STAT
STAT
SCL
SDA
INT
OTG
SCL
SDA
INT
OTG
CE
CE
NUMBER
TYPE
Pin Functions
DESCRIPTION
1,24
P Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between
VBUS and PMID with VBUS on source. Place a 1-µF ceramic capacitor from VBUS to PGND and place
it as close as possible to IC.
2
I Power source selection input. High indicates a USB host source and Low indicates an adapter source.
2
I Positive line of the USB data line pair. D+/D– based USB host/charging port detection. The detection
Analo ^{includes data contact detection (DCD), primary detection in bc1.2, and non-standard adapters.}
g
3
O Open drain active low power good indicator. Connect to the pull up rail via 10-kΩ resistor. LOW
indicates a good input source if the input voltage is between UVLO and ACOV, above SLEEP mode
threshold, and current limit is above 30 mA.
3
I Negative line of the USB data line pair. D+/D– based USB host/charging port detection. The detection
Analo ^{includes data contact detection (DCD), primary detection in bc1.2, and non-standard adapters.}
g
4
O Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10-
kΩ resistor. LOW indicates charge in progress. HIGH indicates charge complete or charge disabled.
When any fault condition occurs, STAT pin in the charge blinks at 1 Hz.
5
I I²C Interface clock. Connect SCL to the logic rail through a 10-kΩ resistor.
6
I/O I²C Interface data. Connect SDA to the logic rail through a 10-kΩ resistor.
7
O Open-drain Interrupt Output. Connect the INT to a logic rail via 10kΩ resistor. The INT pin sends active
low, 256-µs pulse to host to report charger device status and fault.
8
I USB current limit selection pin during buck mode, and active high enable pin during boost mode.
Digital _{For bq24296, when in buck mode with USB host (PSEL = High), when OTG = High, IIN limit = 500 mA}
and when OTG = Low, IIN limit = 100 mA.
For bq24297, when in buck mode with USB host, when OTG = High, IIN limit = 500 mA and when OTG
= Low, IIN limit = 100 mA.
The boost mode is activated when the REG01[5] = 1 and OTG pin is High.
9
I Active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low.
CE pin must be pulled high or low.
4
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