SMJ44C251 Datasheet, PDF (35/53 Pages) Texas Instruments – 262144 BY 4-BIT MULTIPORT VIDEO RAM

SMJ44C251B
262144 BY 4-BIT
MULTIPORT VIDEO RAM
SGMS058A – MARCH 1995 – REVISED JUNE 1995
PARAMETER MEASUREMENT INFORMATION
RAS
tc( _{W )}
tw(RL)
tt
td(CHRL)
CAS
td(RLCA)
th(RA)
tsu(RA)
A0 – A8
Row
tsu(SFR)
th(SFR)
td(RLCL)
td(RLCH)
td(CLRH)
tw(CL)
th(RLCA)
tsu(CA)
td(CARH)
th(CLCA)
th(RSF)
tsu(SFC)
Block Address
A2 – A8
th(SFC)
DSF
1
TRG
tsu( _TRG)
td(GHD)
tsu( _WRH)
tsu( _WCH)
th(RLW ₎
tsu( _WMR)
th(RWM)
th(CLW ₎
th( _WLG)
W
2
tw( _WL)
tsu(DQR)
th(RDQ)
tsu(DWL)
th( _WLD)
th(RLD)
DQ0 – DQ3
3
4
tw(RH)
tt
td(CHRL)
tw(CH)
Figure 23. Block-Write-Cycle Timing (Delayed-Write)
Table 10. Block-Write-Cycle State Table
CYCLE
Write-mask load/use, block write
Use previous write mask, block write
Write mask disabled, block write to all I/Os
Write mask data 0: I/O write disable
1: I/O write enable
Column mask data DQn =
0 column write disable
(n = 0, 1, 2, 3) 1 column write enable
STATE
1
2
3
4
L
L
Write mask Column mask
H
L
Don’t care Column mask
L
H
Don’t care Column mask
DQ0 — column 0 (address A1 = 0, A0 = 0)
DQ1 — column 1 (address A1 = 0, A0 = 1)
DQ2 — column 2 (address A1 = 1, A0 = 0)
DQ3 — column 3 (address A1 = 1, A0 = 1)
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