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OMAP4470_15 Datasheet, PDF (347/450 Pages) Texas Instruments – Multimedia Device Engineering Sample ES1.0
Public Version
OMAP4470
www.ti.com
SWPS048A – AUGUST 2012 – REVISED JANUARY 2013
(1) See DM Operating Condition Addendum for CORE OPP voltages.
(2) Low-Speed mode is a subset of the Full-Speed mode and it is expected to work at low bandwidth (1.5Mb/s).
Table 5-161. Low- / Full-Speed USBB2 Switching Characteristics—Bidirectional Standard 3-pin Mode—1.8
V(1)(2)
NO.
PARAMETER
OPP100, OPP119
OPP50
MIN
MAX
MIN
MAX
FSU21
td(TXENL-DATV)
Delay time usbb2_mm_txen low to
usbb2_mm_txdat valid
81.8
84.8
81.8
84.8
FSU22
td(TXENL-SE0V)
Delay time usbb2_mm_txen low to
usbb2_mm_txse0 valid
81.8
84.8
81.8
84.8
FSU23
tsk(DAT-SE0)
Skew between usbb2_mm_txdat and
usbb2_mm_txse0 transition
1.5
1.5
FSU24
td(DATV-TXENH)
Delay time, usbb2_mm_txdat invalid before
usbb2_mm_txen high
81.8
81.8
FSU25
td(SE0V-TXENH)
Delay time, usbb2_mm_txse0 invalid before
usbb2_mm_txen high
81.8
81.8
(1) See DM Operating Condition Addendum for CORE OPP voltages.
(2) Low-Speed mode is a subset of the Full-Speed mode and it is expected to work at low bandwidth (1.5Mb/s).
UNIT
ns
ns
ns
ns
ns
usbb2_mm_txen
usbb2_mm_txdat
FSU21
Transmit
FSU24
Receive
FSU19
FSU20
usbb2_mm_txse0
FSU22
FSU23
FSU25
FSU19
FSU20
SWPS040-140
Figure 5-98. Low- / Full-Speed USBB2—Bidirectional Standard 3-pin Mode—1.8 V
5.6.8.3.4 Low- / Full-Speed USBB2 (FSUSB)—Bidirectional Standard 3-pin TLL Mode
Table 5-163 and Table 5-164 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 5-99).
Table 5-162. Low- / Full-Speed USBB2 Timing Conditions—Bidirectional TLL 3-pin Mode—1.8 V(1)(2)(3)
TIMING CONDITION PARAMETER
VALUE
UNIT
MIN
MAX
Input Conditions
tR
Input signal rise time
tF
Input signal fall time
PCB Conditions
2
ns
2
ns
Number of external peripherals
1
Far end load
10
pF
Trace length
10
cm
Characteristic impedance
30
60
Ω
(1) IO settings:
– usbb2_mm_txen (ball AE11): DS0 = 0
– usbb2_mm_txdat (ball AF11): DS0 = 0
– usbb2_mm_txse0 (ball AG11): DS0 = 0
For more information, see Control Module / Control Module Functional Description/ Functional Register Description / Signal Integrity
Parameter Control Registers with Pad Group Assignment / I/O cells with Configurable Output Driver Impedance section of the
OMAP4470 TRM.
– Corresponding voltage: 1.8 V
Copyright © 2012–2013, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 347
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