OMAP4470_15 Datasheet, PDF (346/450 Pages) Texas Instruments – Multimedia Device Engineering Sample ES1.0

OMAP4470
Public Version
SWPS048A – AUGUST 2012 – REVISED JANUARY 2013
(1) See DM Operating Condition Addendum for CORE OPP voltages.
(2) Low-Speed mode is a subset of the Full-Speed mode and it is expected to work at low bandwidth (1.5Mb/s).
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usbb2_mm_txen
usbb2_mm_txdat
FSU11
Transmit
FSU15
Receive
FSU9
FSU10
usbb2_mm_txse0
FSU12
FSU13
FSU16
FSU9
FSU10
FSU14
usbb2_mm_rxrcv
SWPS040-139
Figure 5-97. Low- / Full-Speed USBB2—Bidirectional TLL 4-pin Mode—1.8 V
5.6.8.3.3 Low- / Full-Speed USBB2 (FSUSB)—Bidirectional Standard 3-pin Mode
Table 5-160 and Table 5-161 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 5-98).
Table 5-159. Low- / Full-Speed USBB2 Timing Conditions—Bidirectional Standard 3-pin Mode—1.8 V^(1)(2)(3)
TIMING CONDITION PARAMETER
VALUE
UNIT
MIN
MAX
Input Conditions
t_R
Input signal rise time
t_F
Input signal fall time
PCB Conditions
2
ns
2
ns
Number of external peripherals
1
Far end load
10
pF
Trace length
10
cm
Characteristic impedance
30
60
Ω
(1) IO settings:
– usbb2_mm_txen (ball AE11): DS0 = 0
– usbb2_mm_txdat (ball AF11): DS0 = 0
– usbb2_mm_txse0 (ball AG11): DS0 = 0
For more information, see Control Module / Control Module Functional Description/ Functional Register Description / Signal Integrity
Parameter Control Registers with Pad Group Assignment / I/O cells with Configurable Output Driver Impedance section of the
OMAP4470 TRM.
– Corresponding voltage: 1.8 V
(2) In this table the rise and fall times are calculated for 10% to 90% of VDDS. For more information on the corresponding OMAP4 VDDS
power supply name, see Table 2-1, POWER [9] column with the ball name.
(3) To have an idea of the output OMAP4 ball load supported for this application, you can consider the following:
Output OMAP4 ball load = Far End load + 1.34 pF/cm (typical) x trace length (cm).
Table 5-160. Low- / Full-Speed USBB2 Timing Requirements—Bidirectional Standard 3-pin Mode—1.8
V⁽¹⁾⁽²⁾
NO.
FSU19
t_d(DAT,SE0)
FSU20
t_d(DAT,SE0)
PARAMETER
Time duration, usbb2_mm_txdat and
usbb2_mm_txse0 low together during
transition
Time duration, usbb2_mm_txdat and
usbb2_mm_txse0 high together during
transition
OPP100, OPP119
MIN
MAX
14.0
8.0
OPP50
MIN
MAX
14.0
8.0
UNIT
ns
ns
346 Timing Requirements and Switching Characteristics
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