OMAP4470_15 Datasheet, PDF (170/450 Pages) Texas Instruments – Multimedia Device Engineering Sample ES1.0

OMAP4470
SWPS048A – AUGUST 2012 – REVISED JANUARY 2013
Public Version
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TWL6032
VCXIO (ball F15)
I
1 µF
220 nF
220 nF
220 nF
220 nF
OMAP4
1P)1 vdda_dsi1 (ball L1)
1^PP)1 ^{vdda_dsi2 (ball L2)}
1^PP)1 ^{vdda_csi21 (ball W28)}
1P)1 vdda_csi22 (ball V28)
VUSB (ball A7)
I
1 µF
100 nF
100 nF
100 nF
220 nF
220 nF
1P)1 vdda_dpll_core_audio (ball G13)
1P)1 vdda_dpll_mpu (ball P9)
1P)1 vdda_dpll_iva_per (ball Y16)
1P)1 vdda_usba0otg_1p8v (ball A7)
1P)1 vdda_usba0otg_3p3v (ball A5)
Figure 3-4. DPLLs / Complex I/Os VDDA Power PCB Routing Topology
SWPS042-021
3.4.1.3.4 Analog Voltage Decoupling—Example Of OMAP4 Embedded LDOs / BandGap Routing
Guidelines
This section provides an example of OMAP4 embedded LDOs / BandGap routing guidelines based on a
TWL6032 PMIC.
The TWL6032 PMIC power companion provides an SMPS that supplies the IOs and the power
management IPs within the OMAP4 device.
This section describes only PCB requirements for embedded OMAP4 LDOs and Bandgap that supply the
memories inside the OMAP4.
Both LDOs must be routed as a power trace and star-routed to the OMAP4 as shown in Figure 3-5,
OMAP Embedded LDO / Bandgap Power PCB Routing Topology. For each power trace between
TWL6032 PMIC device and the DPLLs, complex IOs power balls:
• Maximum recommended resistance (VDDA + VSSA) by power supply rail must be 0.3 Ω.
• Maximum recommended inductance by power supply rail less than 2 nH (VDD + VSS) must be 30 nH
Each decoupling capacitor must be located as close as possible to the OMAP4 power balls to reduce the
decoupling capacitor loop inductance:
170 Electrical Characteristics
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