TDC1011_15 Datasheet, PDF (32/49 Pages) Texas Instruments – TDC1011 Single Channel Ultrasonic Sensing Analog Front End (AFE) for Level Sensing,Concentration Sensing Applications

TDC1011
SNAS662 – JULY 2015
www.ti.com
Table 7. CONFIG_3 Register Field Descriptions
Bit Field
[7]
RESERVED
Type
R/W
Reset
0h
Description
0h: Reserved (default)
[6]
TEMP_MODE
R/W
0h
Temperature measurement channels
0h: Measure REF, RTD1 and RTD2 (default)
1h: Measure REF and RTD1
[5]
TEMP_RTD_SEL
R/W
0h
RTD type
0h: PT1000 (default)
1h: PT500
[4]
TEMP_CLK_DIV
R/W
0h
Clock divider for temperature mode
0h: Divide by 8 (default)
1h: Use TX_FREQ_DIV
[3]
BLANKING
R/W
0h
Power blanking in standard TOF measurements. The blanking
length is controlled with the TIMING_REG field (see Standard
TOF Measurement with Power Blanking).
0h: Disable power blanking (default)
1h: Enable power blanking
[2:0] ECHO_QUAL_THLD
R/W
3h
Echo qualification DAC threshold level with respect to V_COM
0h: –35 mV
1h: –50 mV
2h: –75 mV
3h: –125 mV (default)
4h: –220 mV
5h: –410 mV
6h: –775 mV
7h: –1500 mV
8.6.1.5 CONFIG_4 Register (address = 4h) [reset = 1Fh] (map)
Figure 45. CONFIG_4 Register
(MSB) 7
6
5
4
RESERVED
RECEIVE_
MODE
TRIG_EDGE_
POLARITY
R/W-0h
R/W-0h
R/W-0h
3
2
1
TX_PH_SHIFT_POS
R/W-1Fh
LEGEND: R/W = Read or write; R = Read only; R/W1C = Read or write 1 to clear
0 (LSB)
Table 8. CONFIG_4 Register Field Descriptions
Bit Field
Type
Reset
Description
[7]
RESERVED
R/W
0h
0h: Reserved (default)
[6]
RECEIVE_MODE
R/W
0h
Receive echo mode
0h: Single echo (default)
1h: Multi echo
[5]
TRIG_EDGE_POLARITY
R/W
0h
Trigger edge polarity
0h: Rising edge (default)
1h: Falling edge
[4:0] TX_PH_SHIFT_POS
R/W
1Fh
TX 180° pulse shift position, ranging from 0 to 31.
1Fh: Position 31 (default)
It is not recommended to set TX_PH_SHIFT_POS to 0 or 1.
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