TDC1011_15 Datasheet, PDF (25/49 Pages) Texas Instruments – TDC1011 Single Channel Ultrasonic Sensing Analog Front End (AFE) for Level Sensing,Concentration Sensing Applications

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TDC1011
SNAS662 – JULY 2015
Device Function Description (continued)
8.4.5.2 TX/RX Measurement Sequencing and Timing
The TDC1011 automatically sequences the TX and RX functionality. After receiving a pulse edge on the
TRIGGER pin, the TDC1011 resynchronizes to the CLKIN signal, and sends a TX burst.
The trigger edge polarity is configured to rising edge by default, but it can be changed to falling edge by setting
the TRIG_EDGE_POLARITY bit in the CONFIG_4 register to 1.
After a device reset, the system must wait a determined time before sending the next trigger signal. The typical
reset to trigger wait time is 3 × T1 + 50 ns.
8.4.6 Time-of-Flight (TOF) Control
The possible configurations of the TX/RX sequencing during a time-of-flight measurement can be divided into
three cases: Short TOF Measurement, Standard TOF Measurement and Standard TOF Measurement with
Power Blanking. Overall, the cases differ in the order of sequencing, power saving and echo listening windows.
The behavior of each case is described in the sections to follow.
8.4.6.1 Short TOF Measurement
TRIG
(see Note A)
Analog OFF
Analog ON
Echo listen period
TX
START
RX
(see Note C)
(see Note B)
STOP
READY
COMMON-MODE
128 x T0
AUTOZERO
2^{AUTOZERO_PERIOD} x 64 x T0
TRANSMIT
NUM_TX x T1
MASK
ECHO LISTEN
END READY
2^{SHORT_TOF_BLANK_PERIOD} x 8 x T0 2^{TOF_TIMEOUT_CTRL} x 128 x T0 1 x T1
A. Common-mode settling time.
B. If NUM_TX < 3, the width of the START pulse is equal to NUM_TX × T1. If NUM_TX ≥ 3, the width of the START
pulse is equal to 3 × T1.
Figure 37. Short TOF Measurement
In a short time of flight measurement, the RX path is activated before the TX burst, as shown in Figure 37.
The short TOF is the default measurement sequence selected at power-on. The short TOF measurement is
selected if the value of the TIMING_REG[9:0] field is less than 30, or if the FORCE_SHORT_TOF bit is set to 1.
The TIMING_REG[9:0] is a 10-bit wide field, with its 2 most significant bits located in the TOF_1 register, and the
8 least significant bits located in the TOF_0 register. The FORCE_SHORT_TOF bit is located in the TIMEOUT
register.
The comparator's input offset is stored in an internal capacitor during the auto-zero period. The length of the
auto-zero period is controlled by the AUTOZERO_PERIOD field in the CLOCK_RATE register.
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