TDC1011_15 Datasheet, PDF (11/49 Pages) Texas Instruments – TDC1011 Single Channel Ultrasonic Sensing Analog Front End (AFE) for Level Sensing,Concentration Sensing Applications

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8 Detailed Description
TDC1011
SNAS662 – JULY 2015
8.1 Overview
The main functional blocks of TDC1011 are the Transmit (TX) and the Receive (RX) Channels. The transmitter
supports flexible settings for driving various ultrasonic transducers, and the receiver provides configurable blocks
with a wide range of settings for signal conditioning in various applications. The receive signal chain consists of
an LNA (Low Noise Amplifier), a PGA (Programmable Gain Amplifier), and two auto-zeroed comparators for
echo qualification and STOP pulse generation.
A measurement cycle is initiated with a trigger signal on the TRIGGER pin of the device. After a trigger signal is
asserted, an output pulse is generated on the START pin. This signal is used as the time reference to begin a
TOF measurement. The transmitter generates programmable TX pulses, synchronous to the rising edge of the
START pulse, to drive an ultrasonic transducer and generate an ultrasonic wave that is shot through an acoustic
medium. The receiver detects the ultrasound wave that traveled through the medium and generates STOP
signals. Whether the ultrasound wave is received directly or from a reflection will depend on the system
configuration. The STOP signals are used by an external Time-to-Digital Converter (TDC), which functions as a
very accurate stopwatch. The system must include a TDC to measure the TOF based on the interval between
the START and STOP pulses. In some applications with medium-range accuracy requirements (ns range), a
microcontroller can be used to measure the TOF duration. In applications with high-range accuracy requirements
(ps range), TI recommends using the TDC7200 time-to-digital converter to measure the TOF duration.
In each application, the TDC1011 has to be configured by a serial interface (SPI) for the various application-
specific parameters that are explained in the following sections.
8.2 Functional Block Diagram
TX
Tx
Generator
Clock
Divider
RX
±
+
LNA
PGA
+
20 dB
VCOM _±
0 to 21 dB
VCOM
TDC1011
SM Control
Unit
Serial
Interface
enable
DAC
Threshold Detect
Event
Manager
START
STOP
Zero-Cross Detect
Analog Bias Temp. Sense
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