TLFD600 Datasheet, PDF (30/37 Pages) Texas Instruments – ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER

TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B – MAY 2000 – REVISED NOVEMBER 2000
PROGRAMMING INFORMATION
NCO_DIV_DELAY – numerically controlled oscillator delay control register
Address: 01101b
D7
D6
NCDLY[7]
NCDLY[6]
Contents at reset: 00000000b
D5
D4
D3
NCDLY[5]
NCDLY[4]
NCDLY[3]
D2
NCDLY[2]
D1
NCDLY[1]
D0
NCDLY[0]
Table 14. NCO Value Table
BIT NAME
D7 D6 D5 D4 D3 D2 D1 D0
DESCRIPTION
NCDLY[7:0]
0
0
0
0
0
0
0
0 Invalid
0
0
0
0
0
0
0
1 ADCLK jittered 1 sample clocks (of ADCLK) after write
into the NCO_DIV_DELAY register
–
–
–
–
–
–
–
– ADCLK jittered 2 to 255 sample clocks (of ADCLK)
after write into the NCO_DIV_DELAY register
NOTE 10: This register is also the only means of communicating to the codec that the ADCLK must be jittered. Thus, not writing a value implies
that jitter will not take place even if other registers have non-default values. This register does not remember its value. All other registers
store their values unless reset.
NCO_DELTA – numerically controlled oscillator delta value register
Address: 01110b
D7
D6
NCDEL[3]
NCDEL[2]
Contents at reset: 00000000b
D5
D4
D3
NCDEL[1]
NCDEL[0]
NCRPT[3]
D2
NCRPT[2]
D1
NCRPT[1]
D0
NCRPT[0]
Table 15. NCO_DELTA Delta and Repeat Table
BIT NAME
D7 D6 D5 D4 D3 D2 D1
NCDEL[3:0]
0
0
0
0
0
0
0
1
1
1
1
1
NCRPT[3:0]
0
0
0
0
0
0
–
–
–
1
1
1
NOTE 11: N = NCODEF[6:0] + DELTA, and ADCCLK = (35.328 × 4)/(N/2).
D0
DELTA = 0
DELTA = 1
DELTA = –1
0 REPEAT = 0
1 REPEAT = 1
–
1 REPEAT = 15
DESCRIPTION
Example:
1. If NCDEL[3:0] = 0000 (DELTA = 0), then N = 64. And ADCCLK = (35.328 × 4)/(N/2).
2. If NCDEL[3:0] = 0001 (DELTA = 1), then N = 65. And ADCCLK = (35.328 × 4)/(N/2).
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