TLFD600 Datasheet, PDF (19/37 Pages) Texas Instruments – ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER

TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B – MAY 2000 – REVISED NOVEMBER 2000
absolute maximum ratings over operating free-air temperature (unless otherwise noted)^†
Supply voltage, AVDD to AGND, DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 4.5 V
Supply voltage, AVDD_DRIVER to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 15 V
Analog input voltage range to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Note 1
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 4.5 V
Operating virtual junction temperature range, T_J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 120°C
Operating free-air temperature range, T_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The analog input pins (RXINP/RXINM) are virtual ac ground in the normal application mode.
recommended operating conditions
power supply
Supply voltage, VCC
analog inputs
Driver analog supply (AVDD_DRIVER)
Analog supply (AVDD_RX, AVDD_REF, AVDD_TX)
Digital supply (DVDD, DVDD_IO, DVDD_RX)
Full scale range (single ended) at point A and B (see Figure 20)
digital inputs
High-level input voltage, VIH
Low-level input voltage, VIL
High-level input current, IIH
Low-level input current, IIL
digital outputs
High-level output voltage, VOH
Low-level output voltage, VOL
clock inputs
RX CPGA = –9 dB
Input clock frequency
Input clock high time
MIN TYP MAX UNIT
12
V
3 3.3 3.6 V
3 3.3 3.6 V
MIN TYP MAX UNIT
4.2
Vp_–p
MIN TYP MAX UNIT
2.4
V
0.6 V
10
µA
10
µA
MIN TYP MAX UNIT
2.4
V
0.6 V
MIN TYP
35.328
13.5 14.15
MAX
15
UNIT
MHz
ns
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