TLFD600 Datasheet, PDF (14/37 Pages) Texas Instruments – ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER

TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B – MAY 2000 – REVISED NOVEMBER 2000
example data transfers (continued)
64 SCLKs
FSR
P
P
P
FSX
P
P
16 SCLKs
SDR
Data
P
P
Don’t care
P
P
Data
P
P
Don’t care
P
Data
SDX Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Figure 14. Example Data Transfers Without Secondary Request in Full Rate and Double TX Mode
(552 Ksps for TX/FSR and 2208 Ksps for RX/FSX)
general-purpose I/O port (GPIO)
The general-purpose I/O port provides input/output pins for control of external circuitry or reading status of
external devices. GPIO0 and GPIO1 can be configured through the control register as input/output. GPO2 to
GPO5 are output only.
The configuration of GPIO0 and GPIO1 pins are controlled by the AUXGPRC register and are reflected in the
GPR-D register. The status of GPIO0 and GPIO1 can also be mapped into the lower 2 bits of the SDX (that is,
from codec to DSP) data stream during primary data transfers. To map the values of GPIO0 and GPIO1 into
the lower 2 bits of the SDX ADC data stream, set the appropriate bit in the main control register (MCR).
Each I/O output is capable of driving 2 mA.
reference system
The integrated reference provides the needed voltage and current to the internal analog blocks. It is also brought
out to external pins for noise decoupling.
auxiliary amplifiers
There are two high-performance auxiliary operational amplifiers on-chip for additional onboard filtering and
amplification at the appropriate configuration. Each op-amp is differential input and differential output and can
be disabled by register programming. The typical specifications are as follows:
DC gain:
126 dB
Bandwidth:
116 MHz
PSRR:
100 dB at dc, 70 dB at 1 MHz and 40 dB at 4 MHz
Input common mode:
1.65-V at 3.3-V power supply
Amplifier input referred noise: 2 nV/√Hz
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