TLC32047C Datasheet, PDF (26/61 Pages) Texas Instruments – Wide-Band Analog Interface Circuit

2.15 Communications Word Sequence
In the dual-word (telephone interface) mode, there are two data words that are presented to the DSP or µP
from DR. The first data word is the ADC conversion result occurring during the FSR time, and the second
is the serial data applied to DATA-DR during the FSD time. FSR is not asserted during secondary
communications and FSD is not asserted during primary communications.
Primary
Communications
4 Shift
Clocks
Secondary
Communications
DX-14 Bits Digital 11
FSX
From DSP to DAC
DX-14 Bits Digital XX
From DSP
TLC32047
DX
Input for D/A
Conversion
Input for Register
Program
TLC32047
FSR
FSD
2s Complement Output
From ADC to the DSP
16 bits Digital From
DATA-DR to DR
TLC32047
Dual-Word
(Telephone Interface)
Mode Only
TLC32047
Dual-Word
(Telephone Interface)
Mode Only
DR
2s Complement Output
From ADC to the DSP
16 bits
Data From DATA-DR
to the DSP
16 bits
TLC32047
Dual-Word
(Telephone Interface)
Mode Only
Figure 2–2. Primary and Secondary Communications Word Sequence
2.15.1 DR Word Bit Pattern
A/D MSB
1st bit sent
↓
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2
A/D LSB
↓
D1 D0
The data word is the 14-bit conversion result of the receive channel to the processor in 2s complement
format. With 16-bit processors, the data is 16 bits long with the two LSBs at zero. Using 8-bit processors,
the data word is transmitted in the same order as one 16-bit word, but as two bytes with the two LSBs of
the second byte set to zero.
2–8