TLC32047C Datasheet, PDF (19/61 Pages) Texas Instruments – Wide-Band Analog Interface Circuit

2 Detailed Description
Table 2–1. Mode-Selection Function Table
DATA-DR/
CONTROL
FSD/
WORD-BYTE
CONTROL
REGISTER
BIT (D5)
OPERATING
MODE
SERIAL
CONFIGURATION
DESCRIPTION
Data in
(0 to 5 V)
FSD out
(0 to 5 V)
Terminal functions DATA-DR†,
FSD†, D11OUT, and D10OUT are
1
Dual-Word
(Telephone
Interface)
Synchronous,
One 16-Bit Word
applicable in this configuration.
FSD is asserted during
secondary communication, but
the FSR is not asserted.
However, FSD remains high
during primary communication.
Data in
(0 to 5 V)
FSD out
(0 to 5 V)
Terminal functions DATA-DR†,
FSD†, D11OUT, and D10OUT are
applicable in this configuration.
FSD is asserted during
secondary communication, but
0
Dual-Word
(Telephone
Interface)
Asynchronous,
One 16-bit Word
the FSR is not asserted.
However, FSD remains high
during primary communication. If
secondary communications occur
while the A/D conversion is being
transmitted from DR, FSD cannot
go low, and data from DATA-DR
cannot go onto DR.
Terminal functions CONTROL†,
1
Synchronous, WORD-BYTE†, EODR, and
One 16-Bit Word EODX are applicable in this
VCC+
configuration.
WORD
Terminal functions CONTROL†,
0
Asynchronous, WORD-BYTE†, EODR, and
One 16-bit Word EODX are applicable in this
VCC–
configuration.
Terminal functions CONTROL†,
1
Synchronous, WORD-BYTE†, EODR, and
Two 8-Bit Bytes EODX are applicable in this
VCC–
configuration.
BYTE
Terminal functions CONTROL†,
0
Asynchronous, WORD-BYTE†, EODR, and
Two 8-Bit Bytes EODX are applicable in this
configuration.
† _{DATA-DR/CONTROL has an internal pulldown resistor to – 5 V, and FSD/WORD-BYTE has an internal pullup resistor}
to 5 V.
2–1