OMAP5910 Datasheet, PDF (15/166 Pages) Texas Instruments – DUAL-CORE PROCESSOR

Features
1 OMAP5910 Features
D Low-Power, High-Performance CMOS
D DSP Peripherals
Technology
− Three 32-Bit Timers and Watchdog Timer
− 0.13-µm Technology
− Level1/Level2 Interrupt Handlers
− 1.6-V Core Voltage
− Six-Channel DMA Controller
D TI925T (MPU) ARM9TDMI Core
− Support 32-Bit and 16-Bit (Thumb
Mode) Instruction Sets
− 16K-Byte Instruction Cache
− 8K-Byte Data Cache
− Two Multichannel Buffered Serial Ports
(McBSP)
− Two Multichannel Serial Interfaces
(MCSI)
D TI925T Peripherals
− Data and Program Memory Management
− Three 32-Bit Timers and Watchdog Timer
Units (MMUs)
− 32-kHz Timer
− Two 64-Entry Translation Look-Aside
− Level1/Level2 Interrupt Handlers
Buffers (TLBs) for MMUs
− USB (Full/Low Speed) Host Interface
− 17-Word Write Buffer
With up to 3 Ports
D TMS320C55x (C55x) DSP Core
− One/Two Instructions Executed per Cycle
− Dual Multipliers (Two Multiply-
Accumulates per Cycle)
− Two Arithmetic/Logic Units
− One Internal Program Bus
− Five Internal Data/Operand Buses
(3 Read Buses and 2 Write Buses)
− 32K x 16-Bit On-Chip Dual-Access RAM
(DARAM) (64K Bytes)
− 48K x 16-Bit On-Chip Single-Access RAM
(SARAM) (96K Bytes)
− 16K x 16-Bit On-Chip ROM (32K Bytes)
− Instruction Cache (24K Bytes)
− Video Hardware Accelerators for DCT,
iDCT, Pixel Interpolation, and Motion
Estimation for Video Compression
D 192K Bytes of Shared Internal SRAM
D Memory Traffic Controller (TC)
− 16-Bit EMIFS External Memory Interface
to Access up to 128M Bytes of Flash,
ROM, or ASRAM
− 16-Bit EMIFF External Memory Interface
to Access up to 64M Bytes of SDRAM
D 9-Channel System DMA Controller
D DSP Memory Management Unit
D Endianism Conversion Logic
− USB (Full Speed) Function Interface
− One Integrated USB Transceiver for
Either Host or Function
− Multichannel Buffered Serial Port
− Inter-Integrated Circuit (I²C) Master and
Slave Interface
− MICROWIRE Serial Interface
− Multimedia Card (MMC) and Secure
Digital (SD) Interface
− HDQ/1-Wire Interface
− Camera Interface for CMOS Sensors
− ETM9 Trace Module for TI925T Debug
− Keyboard Matrix Interface (6 x 5 or 8 x 8)
− Up to Ten MPU General-Purpose I/Os
− Pulse-Width Tone (PWT) Interface
− Pulse-Width Light (PWL) Interface
− Two LED Pulse Generators (LPGs)
− Real-Time Clock (RTC)
− LCD Controller With Dedicated System
DMA Channel
D Shared Peripherals
− Three Universal Asynchronous
Receiver/Transmitters (UARTs) (One
Supporting SIR Mode for IrDA)
− Four Interprocessor Mailboxes
− Up to 14 Shared General-Purpose I/Os
D Individual Power-Saving Modes for
MPU/DSP/TC
D Digital Phase-Locked Loop (DPLL) for
D On-Chip Scan-Based Emulation Logic
MPU/DSP/TC Clocking Control
D IEEE Std 1149.1^† (JTAG) Boundary Scan
Logic
D Two 289-Ball Ball Grid Array Package
TMS320C55x and C55x are trademarks of Texas Instruments.
ARM9TDMI is a trademark of ARM Limited.
Options (GZG and GDY Suffixes)
Thumb is a registered trademark of ARM Limited.
MICROWIRE is a trademark of National Semiconductor Corporation.
1-Wire is a registered trademark of Dallas Semiconductor Corporation.
† _{IEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary Scan Architecture.}
August 2002 − Revised August 2004
SPRS197D
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