SMJ44C256 Datasheet, PDF (13/21 Pages) Texas Instruments – 262144 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY

SMJ44C256
262144 BY 4-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SGMS034C – MAY 1989 – REVISED JUNE 1995
PARAMETER MEASUREMENT INFORMATION
RAS
tc(rdW)
tw(RL)
CAS
tt
td(RLCL)
tw(CL)
td(CHRL)
tw(RH)
tsu(RA)
th(RA)
tsu(CA)
td(RLCA)
th(CA)
tw(CH)
A0 – A8
W
DQ1–
DQ4
Row
Column
Don’t Care
th(RLCA)
td(RLWL)
tsu(rd)
tsu(WCH)
tsu(WRH)
tw(WL)
Don’t Care
ta(C)
td(CAWL)
td(CLWL)
tsu(D)
ta(CA)
See Note A
Don’t Care
Valid Out
Don’t Care
th(D)
Valid In
Don’t Care
ta(R)
ta(G)
tdis(G)
td(GHD)
G Don’t Care
Don’t Care
th(WLGL)
NOTE A: Output can go from the high-impedance state to an invalid-data state prior to the specified access time.
Figure 5. Read-Write- / Read-Modify-Write-Cycle Timing
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